IS43R16800C-5TL ISSI, Integrated Silicon Solution Inc, IS43R16800C-5TL Datasheet - Page 40

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IS43R16800C-5TL

Manufacturer Part Number
IS43R16800C-5TL
Description
IC DDR SDRAM 128MBIT 66TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS43R16800C-5TL

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (8Mx16)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOPII
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IS43R16800C
IC43R16800C
40
DM Control
DM can mask input data. In 16 products, UDM and LDM can mask the upper and lower byte of input data,
respectively. By setting DM to low, data can be written. When DM is set to high, the corresponding data is not
written, and the previous data is held. The latency between DM input and enabling/disabling mask function is 0.
Self-Refresh
The self-refresh command can be used to retain data in the DDR SDRAM, even if the rest of the system is powered
down. When in the self-refresh mode, the DDR SDRAM retains data without external clocking. The self-refresh
command is initiated like an auto-refresh command except CKE is disabled (low). The DLL is automatically disabled
upon entering self-refresh, and is automatically enabled upon exiting self-refresh. Any time the DLL is enabled a
DLL reset must follow and 200 clock cycles should occur before a read command can be issued. Input signals
except CKE are “Don’t care” during self-refresh. Since CKE is an SSTL2 input, VREF must be maintained during
self-refresh.
The procedure for exiting self-refresh requires a sequence of commands. First, CK must be stable prior to CKE
going back high. Once CKE is high, the DDR SDRAM must have NOP commands issued for tSNR because time is
required for the completion of any internal refresh in progress. A simple algorithm for meeting both refresh and DLL
requirements is to apply NOPs for 200 clock cycles before applying any other command.
The use of self-refresh mode introduces the possibility that an internally timed event can be missed when CKE is
raised for exit from self-refresh mode. Upon exit from self-refresh an extra auto-refresh command is recommended.
Command
CKE
/CK
CK
DQS
DQ
DM
t0
Notes: 1. Device must be in the “All banks idle” state prior to entering self-refresh mode.
tCH tCL
tCK
2. tSRD is applied for a read or a read with autoprecharge command.
3. tSNR is applied for any command except a read or a read with autoprecharge command.
t1
t1
t2
Mask
t3
t2
Write mask latency = 0
tRP*
t4
1
Self-Refresh
DM Control
tIS tIH
tIS
SELF
t3
t5
Mask
t6
Integrated Silicon Solution, Inc. — www.issi.com
t4
tIS
tm
NOP
t5
≥ tSNR*
NOP
≥ tSRD*
3
2
NOP
t6
Valid
tn
Rev. A
10/13/08

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