SDED5-001G-NAT SanDisk, SDED5-001G-NAT Datasheet - Page 14

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SDED5-001G-NAT

Manufacturer Part Number
SDED5-001G-NAT
Description
IC MDOC H3 1GB FBGA
Manufacturer
SanDisk
Datasheet

Specifications of SDED5-001G-NAT

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
8G (1G x 8)
Interface
Parallel
Voltage - Supply
1.65 V ~ 1.95 V
Operating Temperature
-25°C ~ 85°C
Package / Case
115-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-

Available stocks

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Manufacturer
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Price
Part Number:
SDED5-001G-NAT
Manufacturer:
SanDisk
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SDED5-001G-NAT/Y
Manufacturer:
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1
Rev. 1.3
of these features enables mDOC H3 to implement better security schemes to protect the code and
data it stores.
mDOC H3 can be configured to work with either demux (standard) interface or multiplexed
(MUX) interface. Using a multiplexed interface where data and address lines are multiplexed on
the same lines, reduces the number of signals required to connect mDOC H3 to the CPU.
The combination of unique H3 design, latest NAND technology and Embedded TrueFFS results
in a low-cost, minimal-sized flash disk that achieves unsurpassed reliability levels, enhanced
performance and ease of integration.
This breakthrough in performance, size, cost and design makes mDOC H3 the ideal solution for
mobile handsets and consumer electronics manufacturers who require easy integration, fast time
to market, high-capacity, small size, high-performance and, above all, high-reliability storage to
enable multimedia driven applications such as music, photo, video, TV, GPS, games, email,
office and other applications.
mDOC H3 offers advanced power consumption management throughout the selection of
different operating modes. The operating modes of the mDOC H3 device are designed to be
easily controlled by the chipset and DOC Driver to ensure optimal battery life in mobile devices.
mDOC H3 can be placed in any of the following four operating modes:
The power management flexibility of mDOC H3 allows for the system designers to substantially
reduce the power consumption of the mDOC device, based on the requirements of the mobile
device, to effectively and considerably prolong battery life.
2.2
2.2.1 9x12/10x14/12x18 FBGA Ball Diagrams
Figure 2 shows the mDOC H3 115 ball demux interface ball diagram.
To ensure proper device functionality, balls marked RSRVD are reserved for future use and
should be connected as described in Table 1, Section 2.2.2.
Note: mDOC H3 is designed as a ball to ball compatible with mDOC G3, G4 and H1 products,
14
• Turbo mode - While in Turbo mode, device internal clocks are optimized for maximal
• Power Save mode – While in Power Save mode, device internal clocks are optimized to
• Standby mode – While in Standby mode, the clock of most internal cores is either
• Deep Power Down (DPD) mode - While in Deep Power-Down mode, device quiescent
assuming that the latter were integrated according to the guidelines in the migration
guide. Refer to Migration Guide mDOC G3-P3 G3P3-LP G4 H1 to mDOC H3, for
further information.
performance.
balance between device performance and power consumption.
disconnected or reduced to a minimum. There is no wake-up time penalty.
power dissipation is reduced by disabling internal high current consumers (e.g. flash,
voltage regulators, input buffers, oscillator etc.)
Demux (Standard) Interface
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
Product Overview
92-DS-1205-10

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