SDED5-001G-NAT SanDisk, SDED5-001G-NAT Datasheet - Page 58

• Manufacturer Part Number: SDED5-001G-NAT
• Description: IC MDOC H3 1GB FBGA
• Manufacturer: SanDisk

Specifications of SDED5-001G-NAT

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 8G (1G x 8)
• Interface: Parallel
• Voltage - Supply: 1.65 V ~ 1.95 V
• Operating Temperature: -25°C ~ 85°C
• Package / Case: 115-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

Rev. 1.3
9.8.2.1
The LATENCY field controls the number of clock cycles between mDOC H3 sampling CE#
being asserted and when the first word of data is available to be latched by the host. This number
of clock cycles is equal to 3 + LATENCY.
WAIT_STATE allows setting the number of CLK after the host has read the last word until the
release of the CE#.
The HOLD bit in the Burst Mode Control register can be set to hold each data word valid for two
clock cycles rather than one.
Note: If HOLD = 1, then the data is available to be latched on this clock and on the subsequent
clock.
The LENGTH field must be programmed with the length of the burst to be performed (0
corresponds to 4 cycles; 1 to 8 cycles, 2 to 16 and 3 corresponds to 32 cycles). Each burst cycle
must read exactly this number of words.
The CLK input can be toggled continuously or can be halted. When halting the CLK input, the
following guidelines must be observed:
Note: For full information regarding the Synchronous Burst Mode see the DOC Driver 1.0 Block
58
Device (BD) Software Developer Kit (SDK) Developer Guide.
• 1: One CLK clock before CE# release
• 2: Two CLK clocks before CE# release
• 3: Three CLK clocks before CE# release
• The host must provide a clock signal for the full sequence defined by the LATENCY,
• The clock can be halted momentarily during a burst sequence but the host must
WAIT STATE, HOLD and LENGTH bit fields. The clock can only be stopped after
the release of CE#.
provide rising clock edges for the completion of the burst sequence.
Read Mode
Figure 16: Demux Read Burst Mode
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
Design Considerations
92-DS-1205-10