SDED5-512M-N9Y SanDisk, SDED5-512M-N9Y Datasheet - Page 27

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SDED5-512M-N9Y

Manufacturer Part Number
SDED5-512M-N9Y
Description
IC MDOC H3 4GB 115-FBGA
Manufacturer
SanDisk
Datasheet

Specifications of SDED5-512M-N9Y

Format - Memory
FLASH
Memory Type
FLASH - Nand
Memory Size
4G (512M x 8)
Interface
Parallel
Voltage - Supply
1.65 V ~ 1.95 V
Operating Temperature
-25°C ~ 85°C
Package / Case
115-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Speed
-

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Rev. 1.3
3.2.3
The Serial interface (SPI) provides mDOC H3 a secondary interface with debug and
programming capabilities. mDOC H3 SPI Interface is configured as Slave. All four combinations
of clock phase (CPHA) and clock polarity (CPOL) which are defined by the SPI specification are
supported.
The Serial interface supports two usage scenarios:
1. Debug port: Allowing the host with an SPI interface to read debug messages.
2. Format and Program port: Allowing a programmer to use this port in order to format and
program the device.
The serial protocol debug port provides a means for the serial interface (SPI Slave) to queue and
transmit debug messages to a host equipped with an SPI interface.
All transfers are performed in multiples of 8 bits, with the MSB of each byte transmitted first.
3.3
3.3.1 Host Protocol
Block of registers and logic required for implementing block device operations over the host
interface. This block implements a set of complex transactions required for operating the mDOC
H3 device. These transactions include data storage operations as well as device configuration and
management.
3.3.2 Boot Block (XIP)
The Programmable Boot Block with XIP functionality enables mDOC H3 to act as a boot device
(in addition to performing flash disk data storage functions). This eliminates the need for
expensive, legacy NOR flash or any other boot device on the motherboard.
The Programmable Boot Block is 32KB in size. The Boot Agent, described in the next section, is
responsible for copying the boot code/data from the flash into the boot block.
3.4
Upon power-up or when the RSTIN# signal is de-asserted, the Boot Agent automatically
downloads the Initial Program Loader (IPL) to the Programmable Boot Block. The IPL contains
the code for starting the Host boot process. The download process is quick, and is designed so
that when the CPU accesses mDOC H3 for code execution, the IPL code is already located in the
Programmable Boot Block. During the download process, mDOC H3 does not respond to read or
write accesses. Host systems must therefore observe the requirements described in Section
10.3.12.
During the download process, mDOC H3 asserts the BUSY# signal to indicate to the system that
it is not yet ready to be accessed. Once BUSY# is de-asserted, the system can access mDOC H3.
Note that after IPL is loaded and BUSY# is de-asserted, the Boot Agent continues to download
the embedded TrueFFS from Flash to the mDOC H3 internal RAM, and then executes it.
Downloading the embedded TrueFFS is done in parallel to the host system accessing the IPL
27
Serial Interface
Host Agent
Boot Agent
mDOC H3 EFD Featuring Embedded TrueFFS Data Sheet
Theory of Operation
92-DS-1205-10

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