FSQ321L Fairchild Semiconductor, FSQ321L Datasheet - Page 12

• Manufacturer Part Number: FSQ321L
• Description: IC SWIT PWM GREEN OVP UVLO 8LSOP
• Manufacturer: Fairchild Semiconductor

Specifications of FSQ321L

• Output Isolation: Isolated
• Frequency Range: 84 ~ 95.2kHz
• Voltage - Input: 9 ~ 20 V
• Voltage - Output: 650V
• Power (watts): 10W
• Operating Temperature: -40°C ~ 150°C
• Package / Case: 8-SOP, 8-LSOP
• Power Switch Family: FSQ321
• Power Switch On Resistance: 14Ohm
• Output Current: 530mA
• Number Of Outputs: Single
• Mounting: Surface Mount
• Supply Current: 3mA
• Package Type: LSOP
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Pin Count: 8
• Power Dissipation: 1.5W
• On Resistance (max): 19 Ohms
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 25 C
• Maximum Power Dissipation: 1500 mW
• Mounting Style: SMD/SMT
• Supply Voltage (max): 20 V
• Supply Voltage (min): 0 V
• On Time (max): 13.5 us
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FSQ0365, FSQ0265, FSQ0165, FSQ321, FSQ311 Rev. 1.0.5
© 2006 Fairchild Semiconductor Corporation
Functional Description
1. Startup: At startup, an internal high-voltage current
source supplies the internal bias and charges the
external capacitor (C
illustrated in Figure 20. When V
begins switching and the internal high-voltage current
source is disabled. The FPS continues its normal
switching operation and the power is supplied from the
auxiliary transformer winding unless V
stop voltage of 8V.
2. Feedback Control: FPS employs current mode
control, as shown in Figure 21. An opto-coupler (such as
the FOD817A) and shunt regulator (such as the KA431)
are typically used to implement the feedback network.
Comparing the feedback voltage with the voltage across
the R
switching duty cycle. When the reference pin voltage of
the shunt regulator exceeds the internal reference
voltage of 2.5V, the opto-coupler LED current increases,
thus pulling down the feedback voltage and reducing the
duty cycle. This event typically happens when the input
voltage is increased or the output load is decreased.
2.1 Pulse-by-Pulse Current Limit: Because current
mode control is employed, the peak current through the
SenseFET is limited by the inverting input of PWM
comparator (V
that the 0.9mA current source flows only through the
internal resistor (3R + R = 2.8k), the cathode voltage of
diode D2 is about 2.5V. Since D1 is blocked when the
feedback voltage (V
voltage of the cathode of D2 is clamped at this voltage,
thus clamping V
current through the SenseFET is limited.
FSQ0365RN Rev.00
8V/12V
SENSE
resistor makes it possible to control the
2
Figure 20. Start-up Circuit
FB
V
*), as shown in Figure 21. Assuming
FB
CC
*. Therefore, the peak value of the
FB
a
) connected to the Vcc pin, as
) exceeds 2.5V, the maximum
C
a
V
CC
good
CC
reaches 12V, the FPS
CC
I
goes below the
CH
Internal
Bias
V
V
ref
5
DC
V
str
12
2.2 Leading Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
usually occurs through the SenseFET, caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the R
resistor would lead to incorrect feedback operation in the
current mode PWM control. To counter this effect, the
FPS employs a leading edge blanking (LEB) circuit. This
circuit inhibits the PWM comparator for a short time
(t
3. Synchronization: The FSQ-series employs a valley
switching technique to minimize the switching noise and
loss. The basic waveforms of the valley switching
converter are shown in Figure 22. To minimize the
MOSFET's switching loss, the MOSFET should be
turned on when the drain voltage reaches its minimum
value, as shown in Figure 22. The minimum drain
voltage is indirectly detected by monitoring the V
winding voltage, as shown in Figure 22.
V
FSQ0365RN Rev. 00
LEB
O
Figure 22. Valley Resonant Switching Waveforms
Figure 21. Pulse-Width-Modulation (PWM) Circuit
V
) after the SenseFET is turned on.
V
MOSFET Gate
sync
ds
ON
FOD817A
KA431
V
FB
V
0.7V
DC
C
B
3
I
delay
V
V
SD
t
CC
F
D1
V
ref
300ns Delay
V
0.2V
I
V
FB
V
D2
+
FB
-
RO
RO
V
*
ovp
ON
3R
R
(6V)
OSC
FSQ0365RN Rev.00
OLP
www.fairchildsemi.com
driver
Gate
R
SenseFET
sense
sense
CC