TLE6225G Infineon Technologies, TLE6225G Datasheet - Page 5

• Manufacturer Part Number: TLE6225G
• Description: IC SW SMART QUAD LOSIDE DSO-20
• Manufacturer: Infineon Technologies
• Type: Low Sider

Specifications of TLE6225G

• Input Type: Non-Inverting
• Number Of Outputs: 4
• On-state Resistance: 1.7 Ohm
• Current - Output / Channel: 350mA
• Current - Peak Output: 1A
• Voltage - Supply: 4.5 V ~ 32 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: DSO-20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SP000012168; SP000354574; TLE6225GINTR; TLE6225GNT; TLE6225GT; TLE6225GT

The TLE 6225 G is a quad channel low-side switch with four power DMOS stages. The power
transistors are protected against short to V
voltage by zenerclamp.
The diagnostic logic recognises a fault condition which is indicated by a fault flag.
Output Stage Control
Each output is independently controlled by an input pin and a common enable line, which en-
ables/disables all four outputs. The parallel inputs are high or low active depending on the
PRG pin. If the parallel input pins are not connected (independent of high or low activity) it is
guaranteed that the outputs 1 to 4 are switched OFF. ENA - and PRG - pin itself are internally
pulled down when they are not connected.
ENA - Enable pin.
PRG - Program pin.
Power Transistors
Each of the four output stages has its own zenerclamp. This causes a voltage limitation at the
power transistors when inductive loads are switched off. The outputs are provided with a cur-
rent limitation set to a minimum of 500 mA.
Each output is protected by embedded protection functions. In the event of an overload or
short to supply, the current is internally limited. If this operation leads to an overtemperature
condition, a second protection level (about 170 °C) will turn the effected output into a PWM-
mode (selective thermal shutdown with restart) to prevent critical chip temperatures. The tem-
perature hysteresis is typically 10K.
Diagnostic
The
PRG.
FAULT - pin.
FAULT
pin is an open drain output. The logic status depends on the programming pin
ENA = High:
ENA = Low (GND): Sleep mode. Channels are switched off. Less than
PRG = High:
PRG = Low (GND): Parallel inputs Channel 1 to 4 are low active.
FAULT
FAULT
Functional Description
= High
= Low
Circuit Description
no fault @ PRG = High
no fault @ PRG = Low
Page
Active mode. Channels are enabled
1 µA current consumption.
Parallel inputs Channel 1 to 4 are high active
BB
, overload, overtemperature and against over-
5
Data Sheet TLE 6225 G
05.December 2000