TLE7230R Infineon Technologies, TLE7230R Datasheet
TLE7230R
Specifications of TLE7230R
SP000311685
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TLE7230R Summary of contents
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Smart Octal Low-Side Switch Features Protection Overload, short circuit Overtemperature Overvoltage Low Quiescent Current< 10µA 16 bit SPI (for Daisychain) Direct Parallel Control of Four Channels PWM input (demux) Parallel Inputs High or Low Active Programmable Programmable functions Boolean operation ...
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Power SO 36 package Pin Description Pin Symbol Function 1 GND Ground 2 NC not connected 3 NC not connected 4 OUT1 Output Channel 1 5 OUT2 Output Channel 2 6 IN1 Input Channel 1 7 IN2 Input Channel 2 ...
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Maximum Ratings for T Parameter Supply Voltage Continuous Drain Source Voltage (OUT1...OUT8) Input Voltage, All Inputs and Data Lines Operating Temperature Range Storage Temperature Range Output Current per Channel (see el. characteristics) Reverse current per channel Output Clamping Energy per ...
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Electrical Characteristics Parameter and Conditions V = 4 3.0 to 5.5V; S VDO ° 150 °C ; Reset = H j (unless otherwise specified) 1. Power Supply, Reset ...
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Electrical Characteristics cont. Parameter and Conditions V = 4 3.0 to 5.5V; S VDO ° 150 °C ; Reset = H j (unless otherwise specified) 5. Diagnostic Functions Open ...
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Functional Description The TLE 7230 octal low-side power switch with a serial peripheral interface (SPI) for control and diagnostic feedback of the 8 power DMOS switches. The power transistors are protected load (current limitation), overtemperature and overvoltage ...
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Note: The overtemperature sensors of the output channels are only active if the channel is turned on. Low Quiescent Current Mode (Sleep Mode applying a low signal at the Reset Pin, the device can be set to sleep ...
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CS – Chip Select of the Serial Peripheral Interface SO – Signal Output of the Serial Peripheral Interface SI – Signal Input of the Serial Peripheral Interface. The pin has an internal pull down structure. SCLK – Clock Input of ...
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SI - Serial Input. Serial data bits are shifted in at this pin, the most significant bit (MSB) first. SI informa- tion is read in on the falling edge. Input data is latched in the SPI shift register and then ...
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Register Description: Name Nr MAP 1 Ch8 Ch7 BOL 2 Ch8 Ch7 OVL 3 Ch8 Ch7 OVT 4 Ch8 Ch7 SLE 5 Ch8 Ch7 STA 6 OUT8 OUT7 OUT6 CTL 7 Ch8 Ch7 Input Mapping Register (MAP) Defines ...
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SPI Diagnostics: As soon as a fault occurs for longer than the fault filtering time, the fault information is latched into the diagnosis register (the Fault pin will also change from high to low state). A new error on the ...
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Figure 6: Serial Interface Timing Diagram CS 0 SCKH t lead SCLK Figure 7: Input Timing Diagram 0.7 V SCLK t valid SO 0.2 V VDO SO 0.7 V VDO SO Valid Time Waveforms ...
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P-DSO 36-16 TLE 7230 R SP000067170 V2 Ordering Code Page 13 2005-10-05 ...
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... Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system affect the safety or effectiveness of that device or system. Life support de- vices or systems are intended to be implanted in the human body support and/or maintain and sustain and/or protect human life ...