TLE7237GS Infineon Technologies, TLE7237GS Datasheet - Page 16
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
TLE7237GS
Manufacturer Part Number
TLE7237GS
Description
IC DRIVER SPI 8CH HS/LS 24-SSOP
Manufacturer
Infineon Technologies
Type
High Side/Low Side Driverr
Datasheet
1.TLE7237GS.pdf
(36 pages)
Specifications of TLE7237GS
Input Type
SPI
Number Of Outputs
8
On-state Resistance
900 mOhm
Current - Peak Output
1A
Voltage - Supply
9 V ~ 28 V
Operating Temperature
-40°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output / Channel
-
Other names
SP000297867
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TLE7237GS
Manufacturer:
INFINEON
Quantity:
3 500
Part Number:
TLE7237GS
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
6.3
When switching off inductive loads with low-side switches, the potential at pin OUT rises to
because the inductance intends to continue driving the current. For the high-side channels, the potential at pin
OUT drops below ground potential to
device, see
clamping energy
Figure 5
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the TLE7237GS. This energy can be
calculated with following equations:
These equations simplify under the assumption of
The maximum energy, which is converted into heat, is limited by the thermal design of the component.
Data Sheet
E
E
E
E
=
=
=
=
V
(
1
-- -
2
1
-- -
2
V
LI
LI
D(CL)
bb
L
L
–
2
2
V
⋅
⋅
⋅
S(CL)
Inductive Output Clamp
Figure 5
Output Clamp Implementation
1
1
V
------------------------------- - ln
–
–
bb
V
------------------------------- -
V
--------------- -
V
bb
)
–
E
V
R
bb
S(CL)
⋅
high side
channel
V
AR
bb
L
V
–
D(CL)
V
V
--------------- - ln
V
DS(CL)
see electrical characteristics
bb
V
S(CL)
R
S(CL)
for details. Nevertheless, the maximum allowed load inductance is limited by the max.
D(CL)
L
⋅
⋅
GND
1
–
1
------------------------------- -
V
–
bb
R
--------------- -
V
R
S(CL)
L
–
L
⋅
V
⋅
I
I
L
D(CL)
L
VBB
OUT
V
+
S(CL)
I
L
+
. The voltage clamping is necessary to prevent destruction of the
V
⋅
I
I
S
S
------
R
L
L
I
L
L
⋅
“E
R
------
R
L
L
L
L,
R
AR
= 0:
L
16
” on Page
High-side
Low-side
low side
channel
High-side
Low-side
V
DS(CL)
10.
GND
OUT
V
I
D
D
I
L
OutputClamp.emf
Rev. 1.0, 2008-10-30
L,
R
L
V
DS(CL)
TLE7237GS
Power Stages
potential,
(1)
(2)
(3)
(4)