AMIS30621C6217RG ON Semiconductor, AMIS30621C6217RG Datasheet - Page 35

• Manufacturer Part Number: AMIS30621C6217RG
• Description: IC MOTOR STEPPER DVR/CTLR 20SOIC
• Manufacturer: ON Semiconductor
• Type: Micro Stepping Motor Driverr

Specifications of AMIS30621C6217RG

• Number Of Outputs: 4
• Voltage - Supply: 6.5 V ~ 29 V
• Operating Temperature: -40°C ~ 165°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Product: Stepper Motor Controllers / Drivers
• Operating Supply Voltage: 6.5 V to 29 V
• Supply Current: 800 mA
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output: -
• Applications: -
• Voltage - Load: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Physical Address of the Circuit
order to discriminate it from other ones on the LIN bus. This
address is coded on 7 bits, yielding the theoretical
possibility of 128 different circuits on the same bus.
network is also limited by the physical properties of the bus
line. It is recommended to limit the number of nodes in a LIN
network to not exceed 16. Otherwise the reduced network
impedance may prohibit a fault free communication under
worst case conditions. Every additional node lowers the
network impedance by approximately three percent.
SetPositionShort
significant address bits are used. These bits are shaded in
Figure 23.
“SetPositionShort”. This give coverage for slaves with
different PA3 // HW2 addresses which are attached to the
same LIN bus.
OTP memory bits PA[3:0] from the OTP Memory Structure
and the hardwired address bits HW[2:0]. Depending on the
addressing mode (ADM –bit in OTP Memory Structure) the
combination is as illustrated in Figure 23.
The circuit must be provided with a physical address in
However the maximum number of nodes in a LIN
All LIN commands are using 7−bit addressing except
The physical address AD[6:0] is a combination of four
<ADM> = 0
<ADM> = 1
Figure 23. Combination of OTP and Hardwired
OTP memory
MSB
Address Bits in Function of ADM
The
Figure 22. 7−bit LIN Address
AD[6:0] LIN SLAVE ADDRESS
HW0
MSB
MSB
PA0
Hardwired
ADMbit
HW1
HW0
Ó Ó Ó Ó Ó Ó Ó
Ó Ó Ó Ó Ó Ó Ó
Hardwired
HW2
where only the four least
HW1
Ó Ó Ó Ó Ó Ó Ó
Ó Ó Ó Ó Ó Ó Ó
Ô Ô Ô Ô Ô Ô Ô
Ô Ô Ô Ô Ô Ô Ô
allows
HW2
PA3 PA2 PA1 PA0
OTP memory
PA3 PA2 PA1
OTP memory
the
LSB
use
LSB
LSB
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of
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Note: Pins HW0 and HW1 are 5 V digital inputs, whereas
pin HW2 is compliant with a 12 V level, e.g. it can be
connected to Vbat or GND via a terminal of the PCB. For
SetPositionShort operation: It is recommended to set
HW0 and HW1 to ’1’. If the ADM bit is set to ’1’ the PA0
bit in OTP has to programmed to ’1’. If the ADM bit is set
to ’0’, HW2 has to be set to ’1’.
LIN Frames
frames. A frame is composed of an 8−bit Identifier followed
by 2, 4 or 8 data−bytes and a checksum byte.
Note: the checksum is conform LIN1.3, classic checksum
calculation over only data bytes. (Checksum is an inverted
8−bit sum with carry over all data bytes.)
Writing frames will be used to:
•
•
•
•
Whereas reading frames will be used to:
•
•
•
The LIN frames can be divided in writing and reading
Program the OTP Memory;
Configure the component with the stepper−motor
parameters (current, speed, stepping−mode, etc.);
Provide set−point position for the stepper−motor;
Control the motion state machine.
Get the actual position of the stepper−motor;
Get status information such as error flags;
Verify the right programming and configuration of the
component.