FPF1014 Fairchild Semiconductor, FPF1014 Datasheet - Page 7

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FPF1014

Manufacturer Part Number
FPF1014
Description
IC LOAD SWITCH 1V ADVANCE 6WLCSP
Manufacturer
Fairchild Semiconductor
Series
IntelliMax™r
Type
High Side Switchr
Datasheet

Specifications of FPF1014

Number Of Outputs
1
Rds (on)
27 mOhm
Internal Switch(s)
Yes
Current Limit
1.5A
Voltage - Input
0.8 ~ 1.8 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
6-WLCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
©2009 Fairchild Semiconductor Corporation
FPF1013 / FPF1014 • Rev. 1.0.4
Description of Operation
The FPF1013/4 are low R
controlled turn-on. The core of each device is a 17mΩ (V
V
input operating range of 0.8 to 1.8V. The ON pin controls the
state of the switch.
The FPF1014 contains a 60Ω(typ) on-chip resistor which is
connected internally from V
discharge when the switch is turned off.
On/Off Control
The ON pin is active high and it controls the state of the switch.
Applying a continuous high signal will hold the switch in the ON
state. In order to minimize the switch on resistance, the ON pin
voltage should exceed the input voltage by 2V. This device is
compatible with a GPIO (General Purpose Input/Output) port,
where the logic voltage level can be configured to 4V
V
Application Information
Typical Application
Input Capacitor
To limit the voltage drop on the input supply caused by transient
in-rush currents when the switch turns-on, a capacitor must be
placed between V
especially when the operating voltage approaches 1V a 10μF
ceramic capacitor should be placed close to the V
values of C
during higher current modes of operation.
Output Capacitor
A 0.1μF capacitor, C
GND. This capacitor will prevent parasitic board inductance
from forcing V
application has a capacitive load, the FPF1014 can be used to
discharged that load through an on-chip output discharge path.
ON
IN
+2V and power consumed is less than 1μA in steady state.
= 3V) N-Channel MOSFET and is customized for a low
V
IN
= 0.8-1.8V
IN
OUT
can be used to further reduce the voltage drop
below GND when the switch turns-off. If the
IN
L
and GND. For minimized voltage drop,
, should be placed between V
DS(ON)
OUT
C
N-Channel load switches with
IN
to GND for quick output
OFF ON
IN
pins. Higher
OUT
IN
V
= 1V,
ON
and
V
ON
IN
7
Timing Diagram
V
Board Layout
For best performance, all traces should be as short as possible.
To be most effective, the input and output capacitors should be
placed close to the device to minimize the effects that parasitic
trace inductances may have on normal and short-circuit
operation. Using wide traces or large copper planes for all pins
(V
electrical effects along with minimizing the case to ambient
thermal impedance.
V
FPF1013/4
OUT
IN
ON
, V
GND
OUT
, ON and GND) will help minimize the parasitic
where:
10%
td
t
t
td
t
t
V
R
ON
F
OFF
ON
OFF
OUT
td
10%
ON
t
ON
= Delay On Time
= V
= Turn On Time
= Delay Off Time
= V
= Turn Off Time
t
90%
R
R
OUT
OUT
L
Rise Time
Fall Time
C
L
www.fairchildsemi.com
td
90%
OFF
t
OFF
90%
t
F
10%

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