L6740L STMicroelectronics, L6740L Datasheet - Page 25

• Manufacturer Part Number: L6740L
• Description: IC HYBRID CONTROLLERS 48TQFP
• Manufacturer: STMicroelectronics

Specifications of L6740L

• Applications: Hybrid Controllers
• Voltage - Supply: 9 V ~ 15 V
• Current - Supply: 20mA
• Operating Temperature: 0°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Number Of Outputs: 2
• Output Current: 170 A
• Input Voltage: 13.2 V
• Mounting Style: SMD/SMT
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: 0 C
• Hybrid Controller: compatible with PVI and SVI CPUs
• Dual Controller: 2 to 4 scalable phases for CPU CORE, 1 phase for NB
• Dual Over-current Protection: Average and per-phase
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Input: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

L6740L
6.3
Caution:
Figure 10. Current reading - CORE section (left) and NB section (right)
The current read through the CSx+ / CSx- pairs is converted into a current I
tional to the current delivered by each phase and the information about the average current
I
error between the read current I
that with a proper gain is used to adjust the duty cycle whose dominant value is set by the
voltage error amplifier in order to equalize the current carried by each phase.
CORE section - load-line and load-indicator (optional)
L6740L is able to introduce a dependence of the output voltage on the load current
recovering part of the drop due to the output capacitor ESR in the load transient. Introducing
a dependence of the output voltage on the load current, a static error, proportional to the
output current, causes the output voltage to vary according to the sensed current.
Figure 10
flowing across the inductor(s) is read through the R - C filter across CSx+ and CSx- pins. R
programs a trans conductance gain and generates a current I
of the phase. The sum of the I
the final gain to program the desired load-line slope
Time constant matching between the inductor (L / DCR) and the current reading filter (RC)
is required to implement a real equivalent output impedance of the system so avoiding over
and/or under shoot of the output voltage as a consequence of a load transient. See
Section
Where R
The whole power supply can be then represented by a “real” voltage generator with an
equivalent output resistance R
R
Load-line (DROOP) implementation is optional, in case it is not desired, the resulting current
information may be employed for other purposes, such as an additional load indicator (LI). In
V
R
AVG
CORE
FB
FB
I
CSx-
resistor can be then designed according to the R
= ΣI
=
=I
R
=
6.2. The output characteristic vs. load current is then given by (Offset disabled):
INFOx
INFOx
LL
LL
VID R
shows the Current Sense Circuit used to implement the Load-Line. The current
VDD Inductor DCR Current Sense
⋅
is the resulting load-line resistance implemented by the CORE section.
------------ -
DCR
R
–
/ N is internally built into the device (N is the number of working phases). The
G
FB
CSx+
CSx-
⋅
I
DROOP
R
G
=
R
CSx
I
LL
PHASEx
Lx
VID R
INFOx
C
and a voltage value of VID.
current is then sourced by the FB pin (I
DCR
–
and the reference I
x
FB
⋅
DCR
------------ - I
R
V
G
OUT
⋅
OUT
(Figure
=
LL
I
NB_ISEN
VID R
AVG
specifications as follow:
–
NB Current Sense across LS Mosfet
9).
is then converted into a voltage
CSx
LL
Output voltage positioning
⋅
proportional to the current
I
OUT
DROOP
From
ext Driver
INFOx
R
ISEN
). R
propor-
FB
gives
I
25/44
NB
G