FAN7602BN Fairchild Semiconductor, FAN7602BN Datasheet - Page 10

• Manufacturer Part Number: FAN7602BN
• Description: IC PWM CTRLR GREEN CURRENT 8-DIP
• Manufacturer: Fairchild Semiconductor

Specifications of FAN7602BN

• Pwm Type: Current Mode
• Number Of Outputs: 1
• Frequency - Max: 73kHz
• Duty Cycle: 80%
• Voltage - Supply: 8 V ~ 20 V
• Buck: No
• Boost: No
• Flyback: Yes
• Inverting: No
• Doubler: No
• Divider: No
• Cuk: No
• Isolated: Yes
• Operating Temperature: -25°C ~ 125°C
• Package / Case: 8-DIP (0.300", 7.62mm)
• Frequency-max: 73kHz
• Output Voltage: 12 V
• Switching Frequency: 65 KHz
• Operating Temperature Range: - 25 C to + 125 C
• Mounting Style: Through Hole
• Duty Cycle (max): 80 %
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

FAN7602B Rev. 1.0.0
© 2007 Fairchild Semiconductor Corporation
4. Burst-Mode Block
The FAN7602B contains the burst-mode block to reduce
the power loss at a light load and no load. A hysteresis
comparator senses the offset voltage of the Burst+ for
the burst mode, as shown in Figure 22. The Burst+ is the
sum of the CS/FB voltage and Plimit offset voltage. The
FAN7602B enters burst mode when the offset voltage of
the Burst+ is higher than 0.95V and exits the burst mode
when the offset voltage is lower than 0.88V. The offset
voltage is sensed during the switch off time.
5. Protection Block
The FAN7602B contains several protection functions to
improve system reliability.
5.1 Overload Protection (OLP)
The FAN7602B contains the overload protection func-
tion. If the output load is higher than the rated output cur-
rent, the output voltage drops and the feedback error
amplifier is saturated. The offset of the CS/FB voltage
representing the feedback information is almost zero. As
shown in Figure 23, the CS/FB voltage is compared with
50mV reference when the internal clock signal is high
and, if the voltage is lower than 50mV, the OLP timer
starts counting. If the OLP condition persists for 22ms,
the timer generates the OLP signal. This protection is
reset by the UVLO. The OLP block is enabled after the
soft-start finishes.
5.2 Line Under-Voltage Protection
If the input voltage of the converter is lower than the min-
imum operating voltage, the converter input current
increases too much, causing component failure. There-
fore, if the input voltage is low, the converter should be
protected. In the FAN7602B, the LUVP circuit senses the
input voltage using the LUVP pin and, if this voltage is
lower than 2V, the LUVP signal is generated. The com-
parator has 0.5V hysteresis. If the LUVP signal is gener-
ated, the output drive block is shut down, the output
C irc u it
Figure 23. Overload Protection Circuit
D e la y
OLP
0 .9 5 V /0 .8 8 V
Figure 22. Burst-Mode Block
Soft-Start
Timer
22ms
+
−
B u rs t+
Clock
O ffs e t
50mV
3
3
CS/FB
C S /F B
10
voltage feedback loop is saturated, and the OLP initiates
if the LUVP condition persists more than 22ms.
5.3 Latch Protection
The latch protection is provided to protect the system
against abnormal conditions using the Latch/Plimit pin.
The Latch/Plimit pin can be used for the output over-
voltage protection and/or other protections. If the Latch/
Plimit pin voltage is made higher than 4V by an external
circuit, the IC is shut down. The latch protection is reset
when the V
5.4 Over-Voltage Protection (OVP)
If the V
the OVP protection is reset when the V
lower than 5V.
6. Output Drive Block
The FAN7602B contains a single totem-pole output
stage to drive a power MOSFET. The drive output is
capable of up to 450mA sourcing current and 600mA
sinking current with typical rise and fall time of 45ns and
35ns, respectively, with a 1nF load.
CC
voltage reaches 19V, the IC shuts down and
CC
Vin
Figure 24. Line UVP Circuit
voltage is lower than 5V.
1
2V/1.5V
−
+
LUVP
CC
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voltage is