FAN5236QSC Fairchild Semiconductor, FAN5236QSC Datasheet - Page 14

• Manufacturer Part Number: FAN5236QSC
• Description: IC CTRLR DDR/PWM DUAL HE 28QSOP
• Manufacturer: Fairchild Semiconductor

Specifications of FAN5236QSC

• Applications: Controller, Mobile-Friendly DDR
• Voltage - Input: 5 ~ 24 V
• Number Of Outputs: 2
• Voltage - Output: 0.9 ~ 5 V
• Operating Temperature: -10°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-QSOP
• Operating Temperature Range: - 10 C to + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FAN5236QSC_NL; FAN5236QSC_NL

PRODUCT SPECIFICATION
Over-Voltage / Under-voltage Protection
Should the VSNS voltage exceed 120% of VREF (0.9V) due
to an upper MOSFET failure, or for other reasons, the over-
voltage protection comparator will force LDRV high. This
action actively pulls down the output voltage and, in the
event of the upper MOSFET failure, will eventually blow the
battery fuse. As soon as the output voltage drops below the
threshold, the OVP comparator is disengaged.
This OVP scheme provides a ‘soft’ crowbar function which
helps to tackle severe load transients and does not invert the
output voltage when activated — a common problem for
latched OVP schemes.
Similarly, if an output short-circuit or severe load transient
causes the output to droop to less than 75% of its regulation
set point, the regulator will shut down.
Over-Temperature Protection
The chip incorporates an over temperature protection circuit
that shuts the chip down when a die temperature of about
150°C is reached. Normal operation is restored at die
temperature below 125°C with internal Power On Reset
asserted, resulting in a full soft-start cycle.
14
1
2
3
Figure 15. Over-Current protection waveforms
CH1 5.0V
CH2 2.0A
IL
PGOOD
VOUT
CH2 100mV
8 CLK
SHUTDOWN
M 10.0µs
Design and Component Selection
Guidelines
As an initial step, define operating input voltage range, out-
put voltage, minimum and maximum load currents for the
controller.
Setting the Output Voltage
The interal reference is 0.9V. The output is divided down by
a voltage divider to the VSEN pin (for example, R5 and R6
in Figure 4). The output voltage therefore is:
To minimize noise pickup on this node, keep the resistor to
GND (R6) below 2K. We selected R6 at 1.82K. Then choose
R5:
For DDR applications converting from 3.3V to 2.5V, or other
applications requiring high duty cycles, the duty cycle clamp
must be disabled by tying the converter’s FPWM to GND.
When converter’s FPWM is GND, the converter’s maximum
duty cycle will be greater than 90%. When using as a DDR
converter with 3.3V input, set up the converter for In-Phase
synchronization by tying the VIN pin to +5V.
Output Inductor Selection
The minimum practical output inductor value is the one that
keeps inductor current just on the boundary of continuous
conduction at some minimum load. The industry standard
practice is to choose the minimum current somewhere from
15% to 35% of the nominal current. At light load, the
controller can automatically switch to hysteretic mode of
operation to sustain high efficiency. The following equations
help to choose the proper value of the output filter inductor.
where I is the inductor ripple current and V
maximum ripple allowed.
for this example we’ll use:
V
F
therefore
L 6 H
SW
I = 20% * 6A = 1.2A
IN
0.9V
----------- -
= 20V, V
R5
L
= 300KHz.
I
R6
=
=
=
2 I
V
----------------------------- -
=
---------------------------------------------------- -
F
IN
1.82K V
SW
V
-------------------------------- -
OUT
MIN
–
OUT
V
R5
OUT
= 2.5V
=
–
I
0.9
0.9V
------------------
OUT
ESR
V
V
--------------
OUT
V
OUT
–
IN
0.9
=
3.24K
REV. 1.1.9 7/12/04
OUT
is the
FAN5236
(10a)
(10b)
(11)
(12)