PXB 4220 E V3.4-G Infineon Technologies, PXB 4220 E V3.4-G Datasheet - Page 282
PXB 4220 E V3.4-G
Manufacturer Part Number
PXB 4220 E V3.4-G
Description
IC ATM/IP INTERWORKING BGA-256
Manufacturer
Infineon Technologies
Datasheet
1.PXB4220E-V33.pdf
(290 pages)
Specifications of PXB 4220 E V3.4-G
Applications
*
Mounting Type
Surface Mount
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
PXB4220EV3.4X
PXB4220EV34GXP
SP000017873
PXB4220EV34GXP
SP000017873
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Figure 78
12.4.2
A DS1 (T1) multiframe consists of 24 frames. They are numbered from 1 to 24. In the
multiframe there are four different signalling bits (A, B, C and D) providing four
independent 333 bit/s channels, two independent 667 bit/s channels or one 1333 bit/s
channel. The four signalling bits for each time slot are transported in the last bit of each
time slot of the frames 6, 12, 18, 24. In these frames only 7 bits are available for data
transmission (Robbed Bit Signalling). When mapping DS1 Nx64 kbit/s frames into ATM
Data Sheet
A TM S D U
of 1st ce ll
A T M S D U
o f 2 nd ce ll
DS1
Example Multiframe Structure for 3x64 kbit/s E1 with CAS
A B C D tim e slot x
A B C D tim e slot z
A A L s tru ctu re po inte r = 0
A A L1 h ead er oc tet
A A L1 h ead er oc tet
tim es lot x
tim es lot y
tim es lot z
tim es lot x
tim es lot y
tim es lot z
tim es lot x
tim es lot y
tim es lot z
tim es lot x
tim es lot y
tim es lot z
tim es lot x
tim es lot y
tim es lot z
tim es lot x
tim es lot y
tim es lot z
tim es lot x
282
A B C D tim es lot y
u nus ed =0 00 0
PXB 4219E, PXB 4220E, PXB 4221E
Example Multiframe Structure for 3x64 kbps E1 with CA
1 st fra m e
2 nd fra m e
1 5th fram e
1 6th fram e
s igna lling
s ub-
s tru ctu re
1 st fra m e
1 4th fram e
IWE8, V3.4
fram e
fram e
m ulti-
m ulti-
2n d
1st
Appendix
2003-01-20
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