SLE 66CLX641P MFCC8 Infineon Technologies, SLE 66CLX641P MFCC8 Datasheet

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SLE 66CLX641P MFCC8

Manufacturer Part Number
SLE 66CLX641P MFCC8
Description
IC SECURITY CTRLR 16BIT MFCC8
Manufacturer
Infineon Technologies
Datasheet

Specifications of SLE 66CLX641P MFCC8

Applications
*
Package / Case
MCC8 Chip Card Module
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Mounting Type
-
Other names
SLE66CLX641PMFCC8
SP000060237
Security & Chip Card ICs
SLE 66CLX641P
16-Bit High Security Contactless Controller
ISO/IEC 14443 Type A & B Compliant Interfaces
For Contactless Operation
with Memory Management and Protection Unit
in 0.22 µm CMOS Technology
136-Kbyte ROM, 5-Kbyte RAM, 64-Kbyte EEPROM
1100-Bit Advanced Crypto Engine
supporting RSA and Elliptic Curve GF(p)
112-Bit / 192-Bit DDES-EC2 Accelerator
n
supporting DES, 3DES and Elliptic Curve GF(2
)
Short Product Information
April 2004

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SLE 66CLX641P MFCC8 Summary of contents

Page 1

Security & Chip Card ICs SLE 66CLX641P 16-Bit High Security Contactless Controller ISO/IEC 14443 Type A & B Compliant Interfaces For Contactless Operation with Memory Management and Protection Unit in 0.22 µm CMOS Technology 136-Kbyte ROM, 5-Kbyte RAM, 64-Kbyte EEPROM ...

Page 2

... Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body support and/or maintain and sustain and/or protect human life ...

Page 3

High Security Contactless Controller ISO/IEC 14443 Type A &B Compliant Interfaces For Contactless Operation with MMU in 0.22 µm CMOS Technology 136-Kbyte ROM, 5-Kbyte RAM, 64-Kbyte EEPROM 1100-Bit Advanced Crypto Engine supporting RSA and Elliptic Curve GF(p) and ...

Page 4

EEPROM (SuperSlim Technology) Byte wise EEPROM programming and read accesses Versatile & Flexible page mode for 1 to 256 bytes write/erase operation 32 bytes security area including bytes chip unique identification number - 16 bytes PROM area ...

Page 5

Application Support HW-& SW-Tools (Emulator, ROM Monitor, Card Emulator, Simulator, Proximity ( Contactless Reader package), SmartMask™ package, Simulated Reader Software, etc.) Open Source Application Notes Tutorial (e.g.: DES and 3DES, Crypto Library, Anticollision and Contactless Transmission Protocols for both ...

Page 6

Timing performances are independent of the Type A or Type B contactless interface. Table 1 Performance Advanced Crypto Engine Operation Modular Exponentiation Modular Exponentiation Modular Exponentiation Modular Exponentiation RSA Encrypt / RSA Signature Verify Modular Exponentiation RSA Decrypt / ...

Page 7

Features (cont’d) Table 2 Performance DDES-EC2 Accelerator Operation High Speed and Secure 56-bit Single DES Encryption (incl. key loading) High Speed and Secure 56-bit Single DES Encryption High Speed and Secure 112-bit Triple DES Encryption (incl. key loading) High ...

Page 8

Pin Description Figure 1 Pad Configuration (die) Table 4 Pin Definitions and Functions Card Contact Symbol LA LB Short Product Information LA LB SLE 66CLX641P Function Coil connection pin LA Coil connection pin SLE 66CLX641P ...

Page 9

General Description The contactless only security controller SLE 66CLX641P is a member of the Infineon Technologies SLE 66CxxxP high-end security controller family in 0.22 µm CMOS technology which is designed for security systems that requires continuous ongoing improvements with ...

Page 10

Timers ease the implementation of advanced communication protocols such as T=CL (according to ISO/IEC 14443-4) and all other time critical processes for contactless communications. Both Timers features auto-reload mechanisms as well as their own dedicated interrupt vectors. Additional interrupts ...

Page 11

As an important feature, SLE 66CLX641P provides a new and enhanced level of on-chip security, which fulfils the strong security requirements of a Common Criteria evaluation at an EAL5 level. Each security measure is designed to act as an ...

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