MT16VDDT6464AG-335GB Micron Technology Inc, MT16VDDT6464AG-335GB Datasheet - Page 22

• Manufacturer Part Number: MT16VDDT6464AG-335GB
• Description: MODULE SDRAM DDR 512MB 184DIMM
• Manufacturer: Micron Technology Inc

Specifications of MT16VDDT6464AG-335GB

• Memory Type: DDR SDRAM
• Memory Size: 512MB
• Speed: 333MT/s
• Package / Case: 184-DIMM
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

pdf: 09005aef80739fa5, source: 09005aef807397e5
DD16C32_64_128_256x64AG.fm - Rev. C 9/04 EN
31. READs and WRITEs with auto precharge are not
32. Any positive glitch in the nominal voltage must be
33. Normal Output Drive Curves:
Figure 9: Pull-Down Characteristics
allowed to be issued until
fied prior to the internal precharge command
being issued.
less than 1/3 of the clock and not more than
+400mV or 2.9V, whichever is less. Any negative
glitch must be less than 1/3 of the clock cycle and
not exceed either 300mV or 2.2V, whichever is
more positive. However, the DC average cannot be
below 2.3V minimum.
a. The full variation in driver pull-down current
b. The variation in driver pull-down current
c. The full variation in driver pull-up current
d. The variation in driver pull-up current within
e. The full variation in the ratio of the maximum
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 9,
Pull-Down Characteristics.
within nominal limits of voltage and tempera-
ture is expected, but not guaranteed, to lie
within the inner bounding lines of the V-I
curve of Figure 9, Pull-Down Characteristics.
from minimum to maximum process, temper-
ature and voltage will lie within the outer
bounding lines of the V-I curve of Figure 10,
Pull-Up Characteristics.
nominal limits of voltage and temperature is
expected, but not guaranteed, to lie within the
inner bounding lines of the V-I curve of Figure
10, Pull-Up Characteristics.
to minimum pull-up and pull-down current
should be between 0.71 and 1.4, for device
t
RAS (MIN) can be satis-
22
256MB, 512MB, 1GB, 2GB (x64, DR)
34. The voltage levels used are derived from a mini-
35. V
36. V
37.
38.
39. During initialization, V
40. For -335, -262, -26A and -265 speed grades, I
Figure 10: Pull-Up Characteristics
mum V
practice, the voltage levels obtained from a prop-
erly terminated bus will provide significantly dif-
ferent voltage values.
pulse width
greater than 1/3 of the cycle rate. VIL undershoot:
V
pulse width can not be greater than 1/3 of the
cycle rate.
t
+
over
t
referenced to a specific voltage level but specify
when the device output is no longer driving
(
be equal to or less than VDD + 0.3V. Alternatively,
V
even if V
42
supply and the input pin.
is specified to be 35mA per DDR SDRAM at 100
MHz.
f. The full variation in the ratio of the nominal
HZ (MAX) takes precedence over
RPST end point and
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
IH
IL
DD
RPST), or begins driving (
TT
184-PIN DDR SDRAM UDIMM
t
RPST (MAX) condition.
drain-to-source voltages from 0.1V to 1.0 Volt,
and at the same voltage and temperature.
pull-up to pull-down current should be unity
±10 percent, for device drain-to-source volt-
ages from 0.1V to 1.0V.
(MIN) = -1.5V for a pulse width
overshoot: V
and V
may be 1.35V maximum during power up,
t
of series resistance is used between the V
DQSCK (MIN) +
DD
DD
DD
level and the referenced test load. In
/V
Q must track each other.
DD
3ns and the pulse width can not be
Q are 0V, provided a minimum of
IH
(MAX) = V
t
RPRE (MAX) condition.
t
RPRE begin point are not
DD
Q, V
t
t
RPRE).
LZ (MIN) will prevail
TT
DD
, and V
©2004 Micron Technology, Inc.
t
Q + 1.5V for a
DQSCK (MAX)
3ns and the
REF
DD
must
3N
TT