PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 280
![MODULE PROC PIC18F4685](/photos/8/96/89696/pcm18xt0_sml.jpg)
PCM18XT0
Manufacturer Part Number
PCM18XT0
Description
MODULE PROC PIC18F4685
Manufacturer
Microchip Technology
Datasheet
1.PCM18XT0.pdf
(484 pages)
Specifications of PCM18XT0
Accessory Type
Processor Module
Product
Microcontroller Modules
Core Processor
PIC18F4685
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
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- Download datasheet (9Mb)
PIC18F2682/2685/4682/4685
EXAMPLE 23-1:
EXAMPLE 23-2:
DS39761C-page 280
WakeupInterrupt
NoInterrupt
ConfigWait:
; Save application required context.
; Poll interrupt flags and determine source of interrupt
; This was found to be CAN interrupt
; TempCANCON and TempCANSTAT are variables defined in Access Bank low
MOVFF
MOVFF
MOVF
ANDLW
ADDWF
BRA
BRA
BRA
BRA
BRA
BRA
BRA
BCF
;
; User code to handle wake-up procedure
;
;
; Continue checking for other interrupt source or return from here
…
…
; Request Configuration mode.
MOVLW
MOVWF
; A request to switch to Configuration mode may not be immediately honored.
; Module will wait for CAN bus to be idle before switching to Configuration Mode.
; Request for other modes such as Loopback, Disable etc. may be honored immediately.
; It is always good practice to wait and verify before continuing.
MOVF
ANDLW
TSTFSZ WREG
BRA
; Module is in Configuration mode now.
; Modify configuration registers as required.
; Switch back to Normal mode to be able to communicate.
CANCON, TempCANCON
CANSTAT, TempCANSTAT
TempCANSTAT, W
B’00001110’
PCL, F
NoInterrupt
ErrorInterrupt
TXB2Interrupt
TXB1Interrupt
TXB0Interrupt
RXB1Interrupt
RXB0Interrupt
PIR3, WAKIF
B’10000000’
CANCON
CANSTAT, W
B’10000000’
ConfigWait
CHANGING TO CONFIGURATION MODE
WIN AND ICODE BITS USAGE IN INTERRUPT SERVICE ROUTINE TO ACCESS
TX/RX BUFFERS
; Save CANCON.WIN bits
; This is required to prevent CANCON
; from corrupting CAN buffer access
; in-progress while this interrupt
; occurred
; Save CANSTAT register
; This is required to make sure that
; we use same CANSTAT value rather
; than one changed by another CAN
; interrupt.
; Retrieve ICODE bits
; Perform computed GOTO
; to corresponding interrupt cause
; 000 = No interrupt
; 001 = Error interrupt
; 010 = TXB2 interrupt
; 011 = TXB1 interrupt
; 100 = TXB0 interrupt
; 101 = RXB1 interrupt
; 110 = RXB0 interrupt
; 111 = Wake-up on interrupt
; Clear the interrupt flag
; PC should never vector here. User may
; place a trap such as infinite loop or pin/port
; indication to catch this error.
; Set to Configuration Mode.
; Read current mode state.
; Interested in OPMODE bits only.
; Is it Configuration mode yet?
; No. Continue to wait...
© 2009 Microchip Technology Inc.
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