PCM18XT0 Microchip Technology, PCM18XT0 Datasheet - Page 81
![MODULE PROC PIC18F4685](/photos/8/96/89696/pcm18xt0_sml.jpg)
PCM18XT0
Manufacturer Part Number
PCM18XT0
Description
MODULE PROC PIC18F4685
Manufacturer
Microchip Technology
Datasheet
1.PCM18XT0.pdf
(484 pages)
Specifications of PCM18XT0
Accessory Type
Processor Module
Product
Microcontroller Modules
Core Processor
PIC18F4685
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Not applicable / Not applicable
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TABLE 5-2:
© 2009 Microchip Technology Inc.
PORTB
PORTA
ECANCON
TXERRCNT
RXERRCNT
COMSTAT
Mode 0
COMSTAT
Mode 1
COMSTAT
Mode 2
CIOCON
BRGCON3
BRGCON2
BRGCON1
CANCON
Mode 0
CANCON
Mode 1
CANCON
Mode 2
CANSTAT
Mode 0
CANSTAT
Modes 1, 2
RXB0D7
RXB0D6
RXB0D5
RXB0D4
RXB0D3
RXB0D2
RXB0D1
RXB0D0
RXB0DLC
RXB0EIDL
RXB0EIDH
RXB0SIDL
RXB0SIDH
RXB0CON
Mode 0
RXB0CON
Mode 1, 2
RXB1D7
RXB1D6
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition. Shaded cells are unimplemented, read as ‘0’.
Note 1:
File Name
2:
3:
4:
5:
6:
7:
8:
9:
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as ‘0’. See Section 4.4 “Brown-out Reset
(BOR)”.
These registers and/or bits are not implemented on PIC18F2682/2685 devices and are read as ‘0’. Reset values are shown for PIC18F4682/4685
devices; individual unimplemented bits should be interpreted as ‘—’.
The PLLEN bit is only available in specific oscillator configurations; otherwise, it is disabled and reads as ‘0’. See Section 2.6.4 “PLL in INTOSC
Modes”.
The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as ‘0’. This bit is read-only.
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes. When
disabled, these bits read as ‘0’.
CAN bits have multiple functions depending on the selected mode of the CAN module.
This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.
These registers and/or bits are available on PIC18F4682/4685 devices only.
SEG2PHTS
RXB0OVFL RXB1OVFL
FIFOEMPT
OPMODE2
OPMODE2
RXB0D77
RXB0D67
RXB0D57
RXB0D47
RXB0D37
RXB0D27
RXB0D17
RXB0D07
RXB1D77
RXB1D67
REQOP2
REQOP2
REQOP2
MDSEL1
WAKDIS
RXFUL
RXFUL
RA7
EID15
REC7
SJW1
SID10
TEC7
EID7
SID2
Bit 7
RB7
—
—
—
Y
REGISTER FILE SUMMARY (PIC18F2682/2685/4682/4685) (CONTINUED)
(6)
RXBnOVFL
RXBnOVFL
OPMODE1 OPMODE0
OPMODE1 OPMODE0 EICODE4
RXB0D76
RXB0D66
RXB0D56
RXB0D46
RXB0D36
RXB0D26
RXB0D16
RXB0D06
RXB1D76
RXB1D66
REQOP1
REQOP1
REQOP1
MDSEL0
WAKFIL
RXRTR
RA6
REC6
EID14
RXM1
RXM1
TEC6
SJW0
Bit 6
SAM
EID6
SID1
SID9
RB6
—
(6)
SEG1PH2
RXB0D75
RXB0D65
RXB0D55
RXB0D45
RXB0D35
RXB0D25
RXB0D15
RXB0D05
RXB1D75
RXB1D65
FIFOWM
REQOP0
REQOP0
REQOP0
ENDRHI
RXM0
RTRRO
REC5
TXBO
TXBO
TXBO
EID13
TEC5
BRP5
Bit 5
EID5
SID0
SID8
RB5
RA5
RB1
—
(7)
SEG1PH1
RXB0D74
RXB0D64
RXB0D54
RXB0D44
RXB0D34
RXB0D24
RXB0D14
RXB0D04
RXB1D74
RXB1D64
CANCAP
FILHIT4
PIC18F2682/2685/4682/4685
EWIN4
REC4
EID12
TEC4
TXBP
TXBP
TXBP
BRP4
ABAT
ABAT
ABAT
Bit 4
EID4
SRR
SID7
RB4
RA4
—
RB0
—
—
(7)
(7)
(7)
RXRTRRO
EICODE3
SEG1PH0
ICODE3
RXB0D73
RXB0D63
RXB0D53
RXB0D43
RXB0D33
RXB0D23
RXB0D13
RXB0D03
RXB1D73
RXB1D63
FILHIT3
WIN2
EWIN3
FP3
REC3
RXBP
RXBP
RXBP
BRP3
EID11
TEC3
DLC3
EXID
Bit 3
EID3
SID6
RB3
RA3
—
—
—
(7)
(7)
(7)
(7)
(7)
(7)
RXBODBEN
EICODE2
ICODE2
SEG2PH2
TXWARN
TXWARN
TXWARN
RXB0D72
RXB0D62
RXB0D52
RXB0D42
RXB0D32
RXB0D22
RXB0D12
RXB0D02
RXB1D72
RXB1D62
PRSEG2
FILHIT2
WIN1
EWIN2
REC2
FP2
EID10
TEC2
BRP2
DLC2
Bit 2
EID2
SID5
RB2
RA2
—
—
—
(7)
(7)
(7)
(7)
(7)
(7)
EICODE1
ICODE1
SEG2PH1
RXWARN
RXWARN
RXWARN
RXB0D71
RXB0D61
RXB0D51
RXB0D41
RXB0D31
RXB0D21
RXB0D11
RXB0D01
RXB1D71
RXB1D61
PRSEG1
JTOFF
FILHIT1
WIN0
EWIN1
REC1
FP1
EID17
TEC1
BRP1
DLC1
EID1
EID9
SID4
Bit 1
RB1
RA1
—
—
(7)
(7)
(7)
(7)
(7)
(7)
EICODE0
SEG2PH0
RXB0D70
RXB0D60
RXB0D50
RXB0D40
RXB0D30
RXB0D20
RXB0D10
RXB0D00
FILHIT0
RXB1D70
RXB1D60
PRSEG0
EWARN
EWARN
EWARN
FILHIT0
EWIN0
REC0
FP0
EID16
TEC0
BRP0
DLC0
EID0
EID8
SID3
Bit 0
—
—
—
RB0
RA0
—
(7)
(7)
(7)
(7)
(7)
(7)
DS39761C-page 81
xxxx xxxx 54, 134
xx00 0000 54, 131
0000 0000 54, 287
0000 0000 54, 296
0000 0000 54, 283
-000 0000 54, 283
0000 0000 54, 283
--00 ---- 54, 317
00-- -000 55, 316
0000 0000 55, 315
0000 0000 55, 314
1000 000- 55, 278
1000 ---- 55, 278
1000 0000 55, 278
100- 000- 55, 279
1000 0000 55, 279
xxxx xxxx 55, 295
xxxx xxxx 55, 295
xxxx xxxx 55, 295
xxxx xxxx 55, 295
xxxx xxxx 55, 295
xxxx xxxx 55, 295
xxxx xxxx 55, 295
xxxx xxxx 55, 295
-xxx xxxx 55, 295
xxxx xxxx 55, 294
xxxx xxxx 55, 294
xxxx x-xx 55, 294
xxxx xxxx 55, 293
000- 0000 55, 290
0000 0000 55, 290
xxxx xxxx 55, 295
xxxx xxxx 55, 295
POR, BOR
0001 000
Value on
on page:
Details
54, 282
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