STEVAL-IPE008V1 STMicroelectronics, STEVAL-IPE008V1 Datasheet - Page 27

• Manufacturer Part Number: STEVAL-IPE008V1
• Description: BOARD EVAL STPM01/STR715FR0
• Manufacturer: STMicroelectronics
• Type: Other Power Managementr

Specifications of STEVAL-IPE008V1

• Main Purpose: Power Management, Energy/Power Meter
• Embedded: Yes, MCU, ARM7
• Utilized Ic / Part: STPM01, STR715FR0
• Primary Attributes: 3-Ph Energy Meter (or Single Phase)
• Secondary Attributes: Measures Active, Reactive, Apparent Power
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: STPM01, STR715FR0
• Other names: 497-6412; STEVAL-IPE008V1

STPM01
Figure 20. Different oscillator circuits (a): with quartz; (b): internal oscillator; (c): with external
8.12.1
the nominal frequency value of CLKOUT. Two nominal frequency ranges are expected, from
4.000 MHz to 4.194 MHz (MDIV = 0) or from 8.000 MHz to 8.192 MHz (MDIV = 1).
source
RC Startup procedure
To use the device with RC oscillator the configuration bit RC (see
Since the default configuration is for a crystal oscillator, when a RC oscillator is used instead
and the device is supplied for the very first time it is not internally clocked and consequently
the DSP is inactive. In this condition it is not possible to set RC or any other configuration bit.
The following SPI procedure can be run in order to set the RC bit and provide the clock to
the device:
●
●
●
●
●
●
●
In this way the RC oscillator is started. If the registers are read again, it can be seen that RD
and RC bits are set, and BANK is cleared.
Once the RC startup procedure is complete, the device is clocked and active and it is
possible to permanently write the RC bit.
For details on mode signals refer to
Set the mode signal BANK;
Perform a software reset;
Read the registers: BANK mode signal should be checked and the records should
show something (not 000000F0);
Set the mode signal RD;
Read the registers through SPI just to check that RD mode signal has been set;
Clear the mode signal BANK;
DO NOT perform a reading, and write configuration bit RC;
Doc ID 10853 Rev 7
Chapter
8.20, for SPI operations refer to
Table
Theory of operation
16) must be set.
Chapter
8.21.
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