CP2201EK Silicon Laboratories Inc, CP2201EK Datasheet - Page 42

KIT EVAL FOR CP2201 ETH CTRLR

CP2201EK

Manufacturer Part Number
CP2201EK
Description
KIT EVAL FOR CP2201 ETH CTRLR
Manufacturer
Silicon Laboratories Inc
Type
Controllers & Processorsr
Datasheets

Specifications of CP2201EK

Main Purpose
Interface, Ethernet Sensor
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
CP2200, CP2201
Primary Attributes
Temperature and Light Sensor
Secondary Attributes
Graphic User Interface
Interface Type
Ethernet
Product
Modules
Silicon Manufacturer
Silicon Labs
Silicon Core Number
CP2201
Silicon Family Name
CP220x
Kit Contents
CP2201 Evaluation Board, Power Adapter, CAT5e Ethernet Cable, CD-ROM, Quick-Start Guide
For Use With/related Products
CP2201
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
336-1316

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CP2201EK
Manufacturer:
SiliconL
Quantity:
8
CP2200/1
9.7. De-Selecting Interrupt Sources
The power-fail (V
enabled after every device reset, regardless of the reset source. The RSTEN register can be used to prevent either
of these two reset sources from generating a device reset.
42
Table 13. Reset Electrical Characteristics
V
RST Output Low Voltage
RST Input High Voltage
RST Input Low Voltage
RST Input Pullup Current
V
Minimum /RST Low Time to
Generate a System Reset
V
V
DD
Bits 7–3: UNUSED. Read = 00000b, Write = don’t care.
Bit 2:
Bit 1:
Bit 0:
DD
DD
DD
= 3.1 to 3.6 V, –40 to +85 °C unless otherwise specified.
POR Threshold (VRST)
Monitor Turn-on Time
Monitor Supply Current
R/W
Bit7
ESWRST: Enable Software Reset
0: Software reset is not selected as a reset source.
1: Software reset is selected as a reset source.
EPFRST: Enable Power Fail Reset
0: The power fail detection circuitry (V
1: The power fail detection circuitry (V
UNUSED. Read = 0b, Write = don’t care.
Parameters
R/W
Bit6
DD
Monitor) reset is automatically enabled after every power-on reset. The software reset is
R/W
Bit5
Register 14. RSTEN: Reset Enable Register
R/W
Bit4
IOL = 8.5 mA
Conditions
DD
DD
R/W
Bit3
Rev. 1.0
Monitor) is not selected as a reset source.
Monitor) is selected as a reset source.
ESWRST EPFRST
R/W
Bit2
0.7 x V
Min
100
2.2
15
R/W
Bit1
DD
Typ
2.4
25
20
R/W
Bit0
0.3 x V
00000100
Reset Value
Address:
Max
0x72
0.6
2.6
50
50
DD
UNITS
µA
µs
µs
V
V
V
V

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