EVL6566A-75WADP STMicroelectronics, EVL6566A-75WADP Datasheet - Page 28

• Manufacturer Part Number: EVL6566A-75WADP
• Description: BOARD EVAL FOR L6566A
• Manufacturer: STMicroelectronics
• Type: Power Factor Correctionr

Specifications of EVL6566A-75WADP

• Main Purpose: AC/DC, Primary and Secondary Side with PFC
• Outputs And Type: 1, Isolated
• Power - Output: 75W
• Voltage - Output: 19V
• Current - Output: 4A
• Voltage - Input: 90 ~ 264VAC
• Frequency - Switching: 65kHz
• Board Type: Fully Populated
• Utilized Ic / Part: L6563, L6566A, TSM1014
• Input Voltage: 90 V to 264 V
• Output Voltage: 19 V
• Dimensions: 78 mm x 174 mm
• Product: Power Management Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Regulator Topology: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: L6563, L6566A
• Other names: 497-6449

Application information
6.7
28/39
Figure 42. Effect of boost inductor saturation on the MOSFET current and detection method
boost inductor the inrush current coming from the bridge rectifier adds up to the switched
current and, furthermore, there is little or no voltage available for demagnetization.
To cope with a saturated inductor, the L6563 is provided with a second comparator on the
current sense pin (CS, pin 4) that stops and latches off the IC if the voltage, normally limited
within 1.1V, exceeds 1.7V. Also the cascaded DC-DC converter can be stopped via the
PWM_LATCH pin that is asserted high. In this way the entire system is stopped and enabled
to restart only after recycling the input power, that is when the Vcc voltages of the L6563
and the PWM controller go below their respective UVLO thresholds. System safety will be
considerably increased.
To better suit the applications where a certain level of saturation of the boost inductor needs
to be tolerated, the L6563A does not support this protection function.
Power management/housekeeping functions
A special feature of this IC is that it facilitates the implementation of the "housekeeping"
circuitry needed to coordinate the operation of the PFC stage to that of the cascaded DC-
DC converter. The functions realized by the housekeeping circuitry ensure that transient
conditions like power-up or power down sequencing or failures of either power stage be
properly handled.
This device provides some pins to do that. As already mentioned, one communication line
between the IC and the PWM controller of the cascaded DC-DC converter is the
PWM_LATCH pin, which is normally open when the PFC works properly and goes high if it
loses control of the output voltage (because of a failure of the control loop) or if the boost
inductor saturates, with the aim of latching off the PWM controller of the cascaded DC-DC
converter as well
details).
A second communication line can be established via the disable function included in the
PFC_OK pin
the PWM controller of the cascaded DC-DC converter to shut down the L6563/A in case of
light load, to minimize the no-load input consumption. Should the residual consumption of
the chip be an issue, it is also possible to cut down the supply voltage. Interface circuits like
those shown in
with standby function, can be used. Needless to say, this operation assumes that the
cascaded DC-DC converter stage works as the master and the PFC stage as the slave or, in
other words, that the DC-DC stage starts first, it powers both controllers and
enables/disables the operation of the PFC stage.
(Section 6.2 on page 18
Figure
(Section 6.2: Feedback Failure Protection (FFP) on page 18
43, where the L6563/A works along with the L5991, PWM controller
for more details ). Typically this line is used to allow
L6563 - L6563A
for more