STEVAL-IFS006V1 STMicroelectronics, STEVAL-IFS006V1 Datasheet - Page 53
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STEVAL-IFS006V1
Manufacturer Part Number
STEVAL-IFS006V1
Description
BOARD EVAL 8BIT MICRO + TDE1708
Manufacturer
STMicroelectronics
Datasheets
1.TDE1708DFT.pdf
(14 pages)
2.STEVAL-IFS006V1.pdf
(136 pages)
3.STEVAL-IFS006V1.pdf
(4 pages)
Specifications of STEVAL-IFS006V1
Design Resources
STEVAL-IFS006V1 Bill of Material
Sensor Type
Proximity
Interface
I²C
Voltage - Supply
6 V ~ 48 V
Embedded
Yes, MCU, 8-Bit
Utilized Ic / Part
ST7FLITEUS5, TDE1708
Processor To Be Evaluated
ST7LITEUS5
Data Bus Width
8 bit
Operating Supply Voltage
6 V to 48 V
Silicon Manufacturer
ST Micro
Silicon Core Number
TDE1708DFT
Kit Application Type
Sensing - Touch / Proximity
Application Sub Type
Proximity Switch
Kit Contents
Board
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Sensitivity
-
Sensing Range
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-6403
STEVAL-IFS006V1
STEVAL-IFS006V1
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
ST7LITEUS2, ST7LITEUS5
Figure 23. Halt timing overview
1. A reset pulse of at least 42µs must be applied when exiting from Halt mode.
Figure 24. Halt mode flowchart
1. WDGHALT is an option bit. See option byte section for more details.
2. Peripheral clocked with an external clock source can still be active.
3. Only some specific interrupts can exit the MCU from Halt mode (such as external interrupt). Refer to
4. Before servicing an interrupt, the CC register is pushed on the stack. The I bit of the CC register is set
5. The CPU clock must be switched to 1 MHz (RC/8) or AWU RC before entering Halt mode.
Table 9: Interrupt mapping
during the interrupt routine and cleared when the CC register is popped.
for more details.
[Active-halt disabled]
INSTRUCTION
N
HALT INSTRUCTION
Run
WATCHDOG
(Active-halt disabled)
WDGHALT
HALT
RESET
1
INTERRUPT
Y
Halt
1)
ENABLE
3)
64 CPU CYCLE
INTERRUPT
OR SERVICE INTERRUPT
0
FETCH RESET VECTOR
64 CPU CLOCK CYCLE
RESET
DELAY
OSCILLATOR
PERIPHERALS
OSCILLATOR
PERIPHERALS
OSCILLATOR
PERIPHERALS
CPU
I BIT
CPU
I BIT
CPU
I BITS
N
OR
DELAY
RESET
Y
WATCHDOG
VECTOR
FETCH
5)
DISABLE
2)
OFF
OFF
OFF
OFF
Run
ON
ON
X
ON
ON
ON
X
0
4)
4)
Power saving modes
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