DV164136 Microchip Technology, DV164136 Datasheet - Page 21

DEVELOPMENT KIT FOR PIC18

DV164136

Manufacturer Part Number
DV164136
Description
DEVELOPMENT KIT FOR PIC18
Manufacturer
Microchip Technology
Series
PIC®r
Type
MCUr
Datasheets

Specifications of DV164136

Contents
Board, Cables, CDs, PICkit™ 3 Programmer, Power Supply
Processor To Be Evaluated
PIC18F8722, PIC18F87J11
Interface Type
RS-232, USB
Operating Supply Voltage
3.3 V, 5 V
Silicon Manufacturer
Microchip
Core Architecture
PIC
Core Sub-architecture
PIC18
Silicon Core Number
PIC18F
Silicon Family Name
PIC18F8xxx
Kit Contents
PIC18 Exp Brd PICkit 3 Cable CD PSU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
PIC18F8722, PIC18F87J11
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DV164136
Manufacturer:
MICROCHIP
Quantity:
12 000
TABLE 1-3:
© 2009 Microchip Technology Inc.
RG0/PMA8/ECCP3/P3A
RG1/PMA7/TX2/CK2
RG2/PMA6/RX2/DT2
RG3/PMCS1/CCP4/P3D
RG4/PMCS2/CCP5/P1D
V
V
AVss
AV
ENVREG
V
Legend: TTL = TTL compatible input
Note 1:
SS
DD
DDCORE
DD
RG0
PMA8
ECCP3
P3A
RG1
PMA7
TX2
CK2
RG2
PMA6
RX2
DT2
RG3
PMCS1
CCP4
P3D
RG4
PMCS2
CCP5
P1D
V
V
DDCORE
CAP
2:
Pin Name
/V
ST = Schmitt Trigger input with CMOS levels
I
P
Default assignment for ECCP2/P2A when Configuration bit, CCP2MX, is set.
Alternate assignment for ECCP2/P2A when Configuration bit, CCP2MX, is cleared.
CAP
= Input
= Power
PIC18F6XJ1X PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Number
9, 25, 41, 56
26, 38, 57
64-TQFP
20
19
18
10
3
4
5
6
8
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
P
P
P
P
P
P
I
I
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
PORTG is a bidirectional I/O port.
Ground reference for logic and I/O pins.
Positive supply for peripheral digital logic and I/O pins.
Ground reference for analog modules.
Positive supply for analog modules.
Enable for on-chip voltage regulator.
Core logic power or external filter capacitor connection.
PIC18F87J11 FAMILY
Digital I/O.
Parallel Master Port address.
Capture 3 input/Compare 3 output/PWM3 output.
ECCP3 PWM output A.
Digital I/O.
Parallel Master Port address.
EUSART2 asynchronous transmit.
EUSART2 synchronous clock (see related RX2/DT2).
Digital I/O.
Parallel Master Port address.
EUSART2 asynchronous receive.
EUSART2 synchronous data (see related TX2/CK2).
Digital I/O.
Parallel Master Port chip select 1.
Capture 4 input/Compare 4 output/PWM4 output.
ECCP3 PWM output D.
Digital I/O.
Parallel Master Port chip select 2.
Capture 5 input/Compare 5 output/PWM5 output.
ECCP1 PWM output D.
Positive supply for microcontroller core logic
(regulator disabled).
External filter capacitor connection (regulator
enabled).
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
DS39778D-page 21
DD
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