DEMO9S08EL32 Freescale Semiconductor, DEMO9S08EL32 Datasheet - Page 87

• Manufacturer Part Number: DEMO9S08EL32
• Description: BOARD DEMO FOR 9S08 EL MCU
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08EL32

• Contents: Evaluation Board
• Processor To Be Evaluated: MC9S08EL32
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 12 V
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08EL
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08EL32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.5.2
Port B is controlled by the registers listed below.
6.5.2.1
6.5.2.2
Freescale Semiconductor
PTBDD[7:0]
PTBD[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTBDD7
PTBD7
Port B Registers
Port B Data Register Bits — For port B pins that are inputs, reads return the logic level on the pin. For port B
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port B pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTBD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups/pull-downs disabled.
Data Direction for Port B Bits — These read/write bits control the direction of port B pins and what is read for
PTBD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port B bit n and PTBD reads return the contents of PTBDn.
Port B Data Register (PTBD)
0
Port B Data Direction Register (PTBDD)
0
7
7
PTBDD6
PTBD6
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
0
0
6
6
Figure 6-12. Port B Data Direction Register (PTBDD)
Table 6-10. PTBDD Register Field Descriptions
Table 6-9. PTBD Register Field Descriptions
Figure 6-11. Port B Data Register (PTBD)
PTBDD5
PTBD5
0
0
5
5
PTBDD4
PTBD4
0
0
4
4
Description
Description
PTBDD3
PTBD3
3
0
3
0
PTBDD2
PTBD2
Chapter 6 Parallel Input/Output Control
0
2
2
0
PTBDD1
PTBD1
0
0
1
1
PTBDD0
PTBD0
0
0
0
0
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