C8051F800DK Silicon Laboratories Inc, C8051F800DK Datasheet - Page 227

KIT DEV C8051F800

C8051F800DK

Manufacturer Part Number
C8051F800DK
Description
KIT DEV C8051F800
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F800DK

Contents
Board, Cables, CD, Debugger, Power Supply
Processor To Be Evaluated
C8051F800
Data Bus Width
16 bit
Interface Type
USB
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F8xx
Lead Free Status / Rohs Status
Supplier Unconfirmed
Other names
336-1797
29.2. PCA0 Interrupt Sources
Figure 29.3 shows a diagram of the PCA interrupt tree. There are five independent event flags that can be
used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set upon
a 16-bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can be set on an over-
flow from the 8th through 15th bit of the PCA0 counter, and the individual flags for each PCA channel
(CCF0, CCF1, and CCF2), which are set according to the operation mode of that module. These event
flags are always set when the trigger condition occurs. Each of these flags can be individually selected to
generate a PCA0 interrupt, using the corresponding interrupt enable flag (ECF for CF, ECOV for COVF,
and ECCFn for each CCFn). PCA0 interrupts must be globally enabled before any individual interrupt
sources are recognized by the processor. PCA0 interrupts are globally enabled by setting the EA bit in the
IE register and the EPCA0 bit in the EIE1 register to logic 1.
PCA Counter/Timer 8-bit
through 15-bit Overflow
PCA Counter/Timer 16-
bit Overflow
P
W
M
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
(for n = 0 to 2)
PCA0CPMn
E
C
O
M
n
C
A
P
P
n
(CCF0)
(CCF1)
(CCF2)
C
N
A
P
n
M
A
T
n
O
G
T
n
P
W
M
n
E
C
C
F
n
C
F
C
R
PCA0CN
Figure 29.3. PCA Interrupt Block Diagram
C
C
F
2
C
C
F
1
C
C
F
0
ECCF0
ECCF1
ECCF2
C
D
L
I
W
D
T
E
PCA0MD
W
D
C
K
L
C
P
S
2
C
P
S
1
0
1
0
1
0
1
C
P
S
0
E
C
F
0
1
Rev. 1.0
A
R
S
E
L
E
C
O
V
PCA0PWM
C
O
V
F
0
1
E
A
R
1
6
C
L
S
E
L
2
C
S
E
L
L
1
C
S
E
L
L
0
Set 8 through 15 bit Operation
C8051F80x-83x
EPCA0
0
1
EA
0
1
Interrupt
Priority
Decoder
227

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