BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 122

KIT STARTER TMPA900 USB JTAG

BMSKTOPASA900(DCE)

Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Datasheets

Specifications of BMSKTOPASA900(DCE)

Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
[Description]
a. <Swidth[2:0]>
b. <DBSize[2:0]>
c.
d. <TransferSize>
Note:
Note: The burst size set in DBsize is unrelated to HBURST of the AHB bus.
Note: The burst size set in SBsize is unrelated to HBURST of the AHB bus.
• DMACCxControl (DMAC Channel x Control Register) (x = 0 to 7)
The transfer source bit width must be an integral multiple of the transfer destination bit
width.
Specifies the total number of transfers when the DMAC is operating as a flow controller.
The <TransferSize> value decrements with respect to each DMA transfer until it reaches 0.
On read, the number of transfers yet to be performed is read.
The total transfer count should be specified in units of the transfer source bit width.
<SBSize[2:0]>
The structure and explanation of these registers are same as DMACC0Control.
Please refer to the explanation of DMACC0Control.
For the name and addresse of these registers, please refer to Table 3.8.3.
Examples:
<Swidth>
8 bits
16 bits
32 bits
If the transfer source bit length is smaller than the transfer destination bit length, caution is required in
specifying the total transfer count. Make sure that the following equation is satisfied.
Transfer source bit length × Total transfer count = Transfer destination bit length × N
N: Integer
Transfer count unit
byte
half-word
word
TENTATIVE
TMPA900CM- 121
TMPA900CM
2009-10-14

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