BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 313
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 313 of 959
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3.11.4
Write:
Read:
include error bits. It is therefore necessary to implement the error correction processing
using ECC (Error Correction Code).
ECC Control
This section describes ECC control. NAND-Flash memory devices may inherently
Figure 3.11.1 shows a basic flowchart for ECC control.
from ECC generator
Valid data write to
Valid data write to
1. When data is written to the actual NAND-Flash memory, the ECC generator in
2. The ECC is written to the redundant area in the NAND-Flash separately from the
1. When data is read from the NAND-Flash memory, the ECC generator in the
2. The ECC written to the redundant area from the NAND-Flash memory is read.
ECC generator
Write ECC to
NAND-Flash
NAND-Flash
Data Write
the NDFC simultaneously generates ECC for the written data.
valid data.
NDFC simultaneously generates ECC for the read data as in the case of data
writing.
The ECC at the time of data writing and that at the time of data reading are used
to calculate error bits for correction.
ECC read
END
Figure 3.11.1 Basic Flow of ECC Control
TENTATIVE
TMPA900CM- 312
Valid data write to
from NAND-Flash
from NAND-Flash
from ECC circuit
ECC generator
Valid data read
Is there Error?
Data Read
ECC read
ECC read
END
No
Yes
Error correct process
TMPA900CM
2009-10-14
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