BMSKTOPASA900(DCE) Toshiba, BMSKTOPASA900(DCE) Datasheet - Page 428
BMSKTOPASA900(DCE)
Manufacturer Part Number
BMSKTOPASA900(DCE)
Description
KIT STARTER TMPA900 USB JTAG
Manufacturer
Toshiba
Series
TOPASr
Type
MCUr
Specifications of BMSKTOPASA900(DCE)
Contents
Evaluation Board, Cable(s), Software and Documentation
For Use With/related Products
TMPA900CMXBG
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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[31:8]
[7:5]
[4]
[3]
[2:0]
[Description]
a. <BC[2:0]>
b. <ACK>
Bit
Note: This module contains two channels of the identical structure. Therefore, the registers of channel 0 only are
1.
recognition.
These bits select the number of transfer bits.
0y000: 8 bits
0y001: 1 bit
0y010: 2 bits
0y011: 3 bits
This bit specifies whether to disable or enable acknowledge clock generation and
0y0: Disable
0y1: Enable
described.
I2C0CR1 (I
−
BC[2:0]
ACK
NOACK
SCK[2:0]
Bit Symbol
2
C0 Control Register 1)
0y111: 7 bits
0y100: 4 bits
0y101: 5 bits
0y110: 6 bits
−
R/W
R/W
R/W
R/W
Type
TENTATIVE
TMPA900CM- 427
Undefined
0y000
0y0
0y0
0y000
Reset
Value
Read as undefined. Write as zero.
Number of transfer bits
0y000: 8 bits
0y001: 1 bit
0y010: 2 bits
0y011: 3 bits
Acknowledge clock generation and recognition
0y0: Disable
0y1: Enable
Slave address match detection and general call
0y0: Enable
0y1: Disable
Serial clock frequency
0y000: n=0
0y001: n=1
0y010: n=2
0y011: n=3
detection
Address = (0xF007_0000) + (0x0000)
Description
0y100: 4 bits
0y101: 5 bits
0y110: 6 bits
0y111: 7 bits
0y100: n=4
0y101: n=5
0y110: n=6
0y111: n=7
TMPA900CM
2009-10-14
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