C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 254
C8051F540-TB
Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F540-TB
Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
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C8051F54x
Note: The CEXn input signal must remain high or low for at least 2 system clock cycles to be recognized by the
24.3.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA counter/timer value is compared to the module's 16-bit capture/compare
register (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in
PCA0CN is set to logic 1. An interrupt request is generated if the CCFn interrupt for that module is
enabled. The CCFn bit is not automatically cleared by hardware when the CPU vectors to the interrupt ser-
vice routine, and must be cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn regis-
ter enables Software Timer mode.
Important Note About Capture/Compare Registers : When writing a 16-bit value to the PCA0 Cap-
ture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
254
Port I/O
hardware.
Crossbar
CEXn
Figure 24.4. PCA Capture Mode Diagram
W
M
P
1
6
n
x
PCA0CPMn
C
O
M
E
n
x
C
A
P
P
n
Rev. 1.1
C
N
A
P
n
0
1
M
A
T
n
0 0 0 x
O
G
T
n
W
M
P
n
C
C
E
F
n
0
1
C
F
C
R
PCA0CN
C
C
F
5
C
C
F
4
C
C
F
3
PCA
Timebase
C
C
F
2
C
C
F
1
C
C
F
0
PCA Interrupt
Capture
PCA0CPLn
PCA0L
PCA0CPHn
PCA0H
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