C8051F540-TB Silicon Laboratories Inc, C8051F540-TB Datasheet - Page 82

BOARD PROTOTYPE W/C8051F540

C8051F540-TB

Manufacturer Part Number
C8051F540-TB
Description
BOARD PROTOTYPE W/C8051F540
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F540-TB

Contents
Board
Processor To Be Evaluated
C8051F54x
Processor Series
C8051F54x
Interface Type
USB
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F54x
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1672
C8051F54x
SFR Definition 10.3. SP: Stack Pointer
SFR Address = 0x81; SFR Page = All Pages
SFR Definition 10.4. ACC: Accumulator
SFR Address = 0xE0; SFR Page = All Pages; Bit-Addressable
SFR Definition 10.5. B: B Register
SFR Address = 0xF0; SFR Page = All Pages; Bit-Addressable
82
Name
Reset
Name
Reset
Name
Reset
7:0
7:0
7:0
Bit
Bit
Bit
Type
Type
Type
Bit
Bit
Bit
ACC[7:0]
SP[7:0]
Name
Name
Name
B[7:0]
7
0
7
0
7
0
Stack Pointer.
The Stack Pointer holds the location of the top of the stack. The stack pointer is incre-
mented before every PUSH operation. The SP register defaults to 0x07 after reset.
Accumulator.
This register is the accumulator for arithmetic operations.
B Register.
This register serves as a second accumulator for certain arithmetic operations.
6
0
6
0
6
0
5
0
5
0
5
0
Rev. 1.1
4
0
4
0
4
0
ACC[7:0]
SP[7:0]
B[7:0]
R/W
R/W
R/W
Function
Function
Function
3
0
3
0
3
0
2
1
2
0
2
0
1
1
1
0
1
0
0
1
0
0
0
0

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