R0E0200F0EMU00 Renesas Electronics America, R0E0200F0EMU00 Datasheet - Page 59

• Manufacturer Part Number: R0E0200F0EMU00
• Description: EMULATOR E200 MAIN BODY-SH7780
• Manufacturer: Renesas Electronics America
• Series: SuperH®r
• Type: In-Circuit Emulatorr

Specifications of R0E0200F0EMU00

• Contents: Emulator Board, Cables, Software and Documentation
• For Use With/related Products: SH7780
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

The Type, BUS, R/W, Address, and Data columns have different meanings according to the type
of trace that has been selected.
Table 1.2 [Trace Window] Display Contents
Trace Type
Branch trace
Memory-
range access
trace
Software trace
System bus
trace
Data lost
CPU wait
generation
Notes: 1.
(b) Function to acquire information outside the MPU by a trace
• PPC: Output from a performance counter
• Instruction, Source, Label: Displays the mnemonic of the instruction at the trace
The acquired trace information is displayed in the [BUS/MFI trace] window.
External Bus Trace Function (BUS trace):
This is a large-capacity trace function that is enabled when the external bus pins of the
MPU are connected to the emulator. If an external memory is read from or written to, trace
information is output in realtime from the external bus pins.
2.
*2
acquisition address, along with the corresponding source code and label information.
Double-clicking on the [Source] column moves the cursor to the corresponding position
in the [Editor] window.
*2
Not displayed when the PPC option is in use.
According to the device being debugged, there may be no output for the [Lost] or
[CPU-WAIT] type. In such a case, it is not possible to clarify whether the trace data
was not output in time or the CPU generated a wait state for the output trace data.
Type Column
BRANCH
DESTINATION
MEMORY
S_TRACE
MEMORY
LOST
CPU-WAIT
*1
BUS Column
No display
No display
No display
No display
No display
No display
No display
R/W Column
No display
No display
Read/write
No display
Read/write
No display
No display
Address Column
Branch source
address
Branch destination
address
Memory access
address
Trace(x) function
execution address
Memory access
address
No display
No display
*1
Data Column
No display
No display
Memory
access data
Variable x
data
Memory
access data
(write only)
No display
No display
33
*1
*1