MCB2100+U NXP Semiconductors, MCB2100+U Datasheet - Page 3

BOARD EVAL/ULINK JTAG LPC210XARM

MCB2100+U

Manufacturer Part Number
MCB2100+U
Description
BOARD EVAL/ULINK JTAG LPC210XARM
Manufacturer
NXP Semiconductors
Series
Keilr
Type
ARM7 Processor, Microcontrollerr
Datasheet

Specifications of MCB2100+U

Contents
Evaluation Board, ULINK JTAG, Debugger and Software
For Use With/related Products
LPC2114,2119,2124,2129,2194
Lead Free Status / RoHS Status
Not applicable / Not applicable
Other names
568-1755
OM10046
NXP Semiconductors
1. Introduction
2. LPC2000 ISP overview
AN10302_4
Application note
In-System programming (ISP) is a method of programming and erasing the on-chip flash
or RAM memory using the boot loader software and a serial port. The part may reside in
the end-user system. The flash boot loader provides an In-System Programming interface
for programming the on-chip flash or RAM memory. This boot loader is located in the
upper 8 kB of flash memory, it can be read but not written to or erased.
The flash boot loader code is executed every time the part is powered on or reset. The
loader can execute the ISP command handler or pass execution to the user application
code.
A LOW level, after reset, at the P0.14 pin is considered as the external hardware request
to start the ISP command handler. The boot loader samples this pin during reset.
Assuming that proper signal is present on X1 pin when the rising edge on RST pin is
generated, it may take up to 3 ms before P0.14 is sampled and the decision on whether to
continue with user code or ISP handler is made. If P0.14 is sampled LOW and the
watchdog overflow flag is set, the external hardware request to start the ISP command
handler is ignored. If there is no request for the ISP command handler execution (P0.14 is
sampled HIGH after reset), a search is made for a valid user program. If a valid user
program is found then the execution control is transferred to it. If a valid user program is
not found, the auto-baud routine is invoked.
Pin P0.14 is used as hardware request for ISP requires special attention. Since P0.14 is in
high impedance mode after reset, it is important that the user provides external hardware
(a pull-up resistor or other device) to put the pin in a defined state. Otherwise unintended
entry into ISP mode may occur.
Figure 1
shows the boot sequence of the LPC210x devices.
Rev. 04 — 12 October 2006
Using the Philips LPC2000 Flash utility
AN10302
© NXP B.V. 2006. All rights reserved.
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