DSPIC33FJ64MC204-I/ML Microchip Technology, DSPIC33FJ64MC204-I/ML Datasheet - Page 223

• Manufacturer Part Number: DSPIC33FJ64MC204-I/ML
• Description: IC DSPIC MCU/DSP 64K 44-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC204-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 44-QFN
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.0
FIGURE 17-1:
© 2009 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
UPDNx
INDXx
QEAx
QEBx
2: Some registers and associated bits
QUADRATURE ENCODER
INTERFACE (QEI) MODULE
Synchronize
of
dsPIC33FJ64MCX02/X04
dsPIC33FJ128MCX02/X04
devices. It is not intended to be a compre-
hensive reference source. To comple-
ment the information in this data sheet,
refer
Encoder Interface (QEI)” (DS70208) of
the “dsPIC33F/PIC24H Family Reference
Manual”, which is available from the
Microchip website (www.microchip.com).
described in this section may not be avail-
able on all devices. Refer to Section 4.0
“Memory Organization” in this data
sheet for device-specific register and bit
information.
Sleep Input
Det
the
to
PCDOUT
UPDN_SRC
QUADRATURE ENCODER INTERFACE BLOCK DIAGRAM (x = 1 OR 2)
Programmable
Programmable
0
1
Programmable
1
0
“Section
Digital Filter
Digital Filter
Digital Filter
QEIxCON<11>
Existing Pin Logic
Up/Down
dsPIC33FJ32MC302/304,
3
QEIM<2:0>
15.
T
CY
Interface Logic
Quadrature
Quadrature
TQCS
family
Encoder
1
0
Mode Select
QEIM<2:0>
and
Preliminary
3
of
TQGATE
1
0
2
This chapter describes the Quadrature Encoder
Interface (QEI) module and associated operational
modes. The QEI module provides the interface to incre-
mental encoders for obtaining mechanical position data.
The operational features of the QEI include:
• Three input channels for two phase signals and
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Quadrature Encoder Interface interrupts
These operating modes are determined by setting the
appropriate bits, QEIM<2:0> in (QEIxCON<10:8>).
Figure 17-1 depicts the Quadrature Encoder Interface
block diagram.
index pulse
Note:
16-bit Up/Down Counter
Max Count Register
D
CK
Comparator/
(POSxCNT)
(MAXxCNT)
Zero Detect
An ‘x’ used in the names of pins, control/
status bits and registers denotes a
particular Quadrature Encoder Interface
(QEI) module number (x = 1 or 2).
Q
Q
1, 8, 64, 256
Prescaler
2
TQCKPS<1:0>
Reset
Equal
DS70291D-page 223
QExIF
Event
Flag