DSPIC33FJ64MC204-I/ML Microchip Technology, DSPIC33FJ64MC204-I/ML Datasheet - Page 52

• Manufacturer Part Number: DSPIC33FJ64MC204-I/ML
• Description: IC DSPIC MCU/DSP 64K 44-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC204-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 44-QFN
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-9:
TABLE 4-10:
TABLE 4-11:
P2TCON
P2TMR
P2TPER
P2SECMP
PWM2CON1
PWM2CON2
P2DTCON1
P2DTCON2
P2FLTACON
P2OVDCON
P2DC1
Legend:
QEI1CON
DFLT1CON
POS1CNT
MAX1CNT
Legend:
QEI2CON
DFLT2CON
POS2CNT
MAX2CNT
Legend:
SFR Name
Name
Name
SFR
SFR
u = uninitialized bit, — = unimplemented, read as ‘0’
u = uninitialized bit, — = unimplemented, read as ‘0’
u = uninitialized bit, — = unimplemented, read as ‘0’
Addr.
Addr.
01E0
01E2
01E4
01E6
Addr.
05CA
05CC
05CE
01F0
01F2
01F4
01F6
05C0
05C2
05C4
05C6
05C8
05D0
05D4
05D6
2-OUTPUT PWM2 REGISTER MAP
QEI1 REGISTER MAP
QEI2 REGISTER MAP
CNTERR
CNTERR
SEVTDIR
Bit 15
Bit 15
PTDIR
Bit 15
PTEN
—
—
—
—
—
DTBPS<1:0>
—
—
—
Bit 14
Bit 14
Bit 14
—
—
—
—
—
—
—
—
—
—
QEISIDL
QEISIDL
PTSIDL
Bit 13
Bit 13
Bit 13
—
—
—
—
—
—
—
Bit 12
Bit 12
INDX
INDX
Bit 12
—
—
—
—
—
—
—
—
UPDN
UPDN
Bit 11
Bit 11
—
—
Bit 11
—
—
—
—
—
DTB<5:0>
Bit 10
Bit 10
IMV<1:0>
IMV<1:0>
Bit 10
SEVOPS<3:0>
QEIM<2:0>
QEIM<2:0>
—
—
—
—
—
Bit 9
Bit 9
POVD1H POVD1L
FAOV1H
Bit 9
—
—
—
Bit 8
CEID
CEID
Bit 8
PWM Duty Cycle #1 Register
PWM Special Event Compare Register
Position Counter<15:0>
Maximum Count<15:0>
Position Counter<15:0>
Maximum Count<15:0>
PWM Timer Count Value Register
PWM Time Base Period Register
FAOV1L
PMOD1
SWPAB
QEOUT
SWPAB
QEOUT
Bit 8
Bit 7
Bit 7
—
—
FLTAM
PCDOUT
PCDOUT
Bit 7
—
—
—
—
Bit 6
Bit 6
DTAPS<1:0>
QECK<2:0>
QECK<2:0>
Bit 6
PTOPS<3:0>
TQGATE
TQGATE
—
—
—
—
—
Bit 5
Bit 5
Bit 5
—
—
—
—
—
Bit 4
Bit 4
TQCKPS<1:0>
TQCKPS<1:0>
PEN1H
Bit 4
—
—
—
—
Bit 3
Bit 3
—
—
Bit 3
PTCKPS<1:0>
—
—
—
—
—
DTA<5:0>
POSRES
POSRES
Bit 2
Bit 2
—
—
Bit 2
IUE
—
—
—
—
TQCS
TQCS
Bit 1
Bit 1
—
—
POUT1H POUT1L
OSYNC
DTS1A
Bit 1
PTMOD<1:0>
—
—
UPDN_SRC
UPDN_SRC
Bit 0
Bit 0
—
—
PEN1L
FAEN1
DTS1I
UDIS
Bit 0
Reset State
Reset State
Reset State
00FF
0000
0000
0000
0000
FF00
0000
0000
0000
0000
FFFF
0000
0000
0000
FFFF
0000
0000
0000
0000