DSPIC33FJ64MC204-I/ML Microchip Technology, DSPIC33FJ64MC204-I/ML Datasheet - Page 286

• Manufacturer Part Number: DSPIC33FJ64MC204-I/ML
• Description: IC DSPIC MCU/DSP 64K 44-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC204-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 44-QFN
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 22-7:
REGISTER 22-8:
DS70291D-page 286
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 8-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-9
bit 8-0
Note 1: On devices without nine analog inputs, all AD1CSSL bits can be selected by user application. However,
Note 1: On devices without nine analog inputs, all PCFG bits are R/W by user. However, PCFG bits are ignored
PCFG7
R/W-0
R/W-0
CSS7
U-0
U-0
—
—
2: CSSx = ANx, where x = 0 through 8.
2: PCFGx = ANx, where x = 0 through 8.
3: PCFGx bits have no effect if ADC module is disabled by setting ADxMD bit in the PMDx register. In this
inputs selected for scan without a corresponding input on device converts V
on ports without a corresponding input on device.
case, all port pins are multiplexed with ANx will be in Digital mode.
Unimplemented: Read as ‘0’
CSS<8:0>: ADC Input Scan Selection bits
1 = Select ANx for input scan
0 = Skip ANx for input scan
Unimplemented: Read as ‘0’
PCFG<8:0>: ADC Port Configuration Control bits
1 = Port pin in Digital mode, port read input enabled, ADC input multiplexer connected to AV
0 = Port pin in Analog mode, port read input disabled, ADC samples pin voltage
PCFG6
R/W-0
R/W-0
CSS6
U-0
U-0
—
—
AD1CSSL: ADC1 INPUT SCAN SELECT REGISTER LOW
AD1PCFGL: ADC1 PORT CONFIGURATION REGISTER LOW
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PCFG5
R/W-0
R/W-0
CSS5
U-0
U-0
—
—
PCFG4
R/W-0
R/W-0
CSS4
Preliminary
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PCFG3
R/W-0
R/W-0
CSS3
U-0
U-0
—
—
PCFG2
R/W-0
R/W-0
CSS2
U-0
U-0
—
—
© 2009 Microchip Technology Inc.
REF
(1,2)
x = Bit is unknown
x = Bit is unknown
L
.
PCFG1
R/W-0
R/W-0
CSS1
(1,2,3)
U-0
U-0
—
—
PCFG8
PCFG0
R/W-0
R/W-0
R/W-0
R/W-0
CSS8
CSS0
SS
bit 8
bit 0
bit 8
bit 0