DSPIC33FJ64MC204-I/ML Microchip Technology, DSPIC33FJ64MC204-I/ML Datasheet - Page 322

IC DSPIC MCU/DSP 64K 44-QFN

DSPIC33FJ64MC204-I/ML

Manufacturer Part Number
DSPIC33FJ64MC204-I/ML
Description
IC DSPIC MCU/DSP 64K 44-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC204-I/ML

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
44-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
35
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 9x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Data Ram Size
8 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 28-2:
DS70291D-page 322
Note 1: This Configuration register is not available on dsPIC33FJ32MC302/304 devices.
RBS<1:0>
RSS<1:0>
BSS<2:0>
SSS<2:0>
SWRP
Bit Field
BWRP
(1)
(1)
(1)
dsPIC33F CONFIGURATION BITS DESCRIPTION
Register
FSS
FSS
FBS
FBS
FBS
FSS
(1)
(1)
Boot Segment Program Flash Write Protection
1 = Boot segment can be written
0 = Boot segment is write-protected
Boot Segment Program Flash Code Protection Size
X11 = No Boot program Flash segment
Boot space is 1K Instruction Words (except interrupt vectors)
110 = Standard security; boot program Flash segment ends at
010 = High security; boot program Flash segment ends at 0x0007FE
Boot space is 4K Instruction Words (except interrupt vectors)
101 = Standard security; boot program Flash segment, ends at
001 = High security; boot program Flash segment ends at 0x001FFE
Boot space is 8K Instruction Words (except interrupt vectors)
100 = Standard security; boot program Flash segment ends at
000 = High security; boot program Flash segment ends at 0x003FFE
Boot Segment RAM Code Protection Size
11 = No Boot RAM defined
10 = Boot RAM is 128 bytes
01 = Boot RAM is 256 bytes
00 = Boot RAM is 1024 bytes
Secure Segment Program Flash Write-Protect bit
1 = Secure Segment can bet written
0 = Secure Segment is write-protected
Secure Segment Program Flash Code Protection Size
(Secure segment is not implemented on 32K devices)
X11 = No Secure program flash segment
Secure space is 4K IW less BS
110 = Standard security; secure program flash segment starts at End
010 = High security; secure program flash segment starts at End of BS,
Secure space is 8K IW less BS
101 = Standard security; secure program flash segment starts at End
001 = High security; secure program flash segment starts at End of BS,
Secure space is 16K IW less BS
100 = Standard security; secure program flash segment starts at End
000 = High security; secure program flash segment starts at End of BS,
Secure Segment RAM Code Protection
11 = No Secure RAM defined
10 = Secure RAM is 256 Bytes less BS RAM
01 = Secure RAM is 2048 Bytes less BS RAM
00 = Secure RAM is 4096 Bytes less BS RAM
Preliminary
of BS, ends at 0x001FFE
ends at 0x001FFE
of BS, ends at 0x003FFE
ends at 0x003FFE
of BS, ends at 007FFEh
ends at 0x007FFE
0x0007FE
0x001FFE
0x003FFE
Description
© 2009 Microchip Technology Inc.

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