DSPIC33FJ64MC204-I/ML Microchip Technology, DSPIC33FJ64MC204-I/ML Datasheet - Page 418

• Manufacturer Part Number: DSPIC33FJ64MC204-I/ML
• Description: IC DSPIC MCU/DSP 64K 44-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64MC204-I/ML

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 44-QFN
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 8 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164336 - MODULE SOCKET FOR PM3 28/44QFNDM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Reset
Reset Sequence.................................................................. 91
Resets ................................................................................. 83
S
Serial Peripheral Interface (SPI) ....................................... 227
Software Reset Instruction (SWR) ...................................... 89
Software Simulator (MPLAB SIM)..................................... 341
Software Stack Pointer, Frame Pointer
DS70291D-page 418
INTCON1 (Interrupt Control 1) .................................... 97
INTCON2 (Interrupt Control 2) .................................... 99
INTTREG Interrupt Control and Status Register....... 131
IPC0 (Interrupt Priority Control 0) ............................. 114
IPC1 (Interrupt Priority Control 1) ............................. 115
IPC11 (Interrupt Priority Control 11) ......................... 124
IPC14 (Interrupt Priority Control 14) ......................... 125
IPC15 (Interrupt Priority Control 15) ......................... 126
IPC16 (Interrupt Priority Control 16) ......................... 127
IPC17 (Interrupt Priority Control 17) ......................... 128
IPC18 (Interrupt Priority Control 18) ................. 129, 130
IPC2 (Interrupt Priority Control 2) ............................. 116
IPC3 (Interrupt Priority Control 3) ............................. 117
IPC4 (Interrupt Priority Control 4) ............................. 118
IPC5 (Interrupt Priority Control 5) ............................. 119
IPC6 (Interrupt Priority Control 6) ............................. 120
IPC7 (Interrupt Priority Control 7) ............................. 121
IPC8 (Interrupt Priority Control 8) ............................. 122
IPC9 (Interrupt Priority Control 9) ............................. 123
NVMCON (Flash Memory Control) ............................. 79
NVMKEY (Nonvolatile Memory Key) .......................... 80
OCxCON (Output Compare x Control) ..................... 207
OSCCON (Oscillator Control) ................................... 149
OSCTUN (FRC Oscillator Tuning) ............................ 153
P1DC3 (PWM Duty Cycle 3) ..................................... 221
PLLFBD (PLL Feedback Divisor) .............................. 152
PMD1 (Peripheral Module Disable Control Register 1)...
PMD2 (Peripheral Module Disable Control Register 2)...
PMD3 (Peripheral Module Disable Control Register 3)...
PWMxCON1 (PWM Control 1).................................. 215
PWMxCON2 (PWM Control 2).................................. 216
PxDC1 (PWM Duty Cycle 1) ..................................... 221
PxDC2 (PWM Duty Cycle 2) ..................................... 221
PxDTCON1 (Dead-Time Control 1) .......................... 217
PxDTCON2 (Dead-Time Control 2) .......................... 218
PxFLTACON (Fault A Control).................................. 219
PxOVDCON (Override Control) ................................ 220
PxSECMP (Special Event Compare) ........................ 214
PxTCON (PWM Time Base Control). 212, 289, 290, 291
PxTMR (PWM Timer Count Value) ........................... 213
PxTPER (PWM Time Base Period) .......................... 213
QEICON (QEI Control).............................................. 224
RCON (Reset Control) ................................................ 84
SPIxCON1 (SPIx Control 1) ...................................... 229
SPIxCON2 (SPIx Control 2) ...................................... 231
SPIxSTAT (SPIx Status and Control) ....................... 228
SR (CPU Status) ................................................... 29, 96
T1CON (Timer1 Control)........................................... 196
TCxCON (Input Capture x Control) ........................... 204
TxCON (Type B Time Base Control) ........................ 200
TyCON (Type C Time Base Control) ........................ 201
UxMODE (UARTx Mode) .......................................... 242
UxSTA (UARTx Status and Control) ......................... 244
Illegal Opcode ....................................................... 83, 90
Trap Conflict.......................................................... 89, 90
Uninitialized W Register ........................................ 83, 90
159
161
162
Preliminary
Special Features of the CPU ............................................ 321
SPI Module
Symbols Used in Opcode Descriptions ............................ 332
System Control
T
Temperature and Voltage Specifications
Timer1............................................................................... 195
Timer2/3............................................................................ 197
Timing Characteristics
Timing Diagrams
Timing Requirements
Timing Specifications
CALLL Stack Frame ................................................... 67
SPI1 Register Map...................................................... 54
Register Map ........................................................ 65, 66
AC..................................................................... 352, 392
CLKO and I/O ........................................................... 355
10-bit ADC Conversion (CHPS<1:0> = 01, SIMSAM = 0,
10-bit ADC Conversion (CHPS<1:0> = 01, SIMSAM = 0,
12-bit ADC Conversion (ASAM = 0, SSRC<2:0> = 000)
Brown-out Situations................................................... 89
ECAN I/O .................................................................. 375
External Clock........................................................... 353
I2Cx Bus Data (Master Mode) .................................. 371
I2Cx Bus Data (Slave Mode) .................................... 373
I2Cx Bus Start/Stop Bits (Master Mode)................... 371
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 373
Input Capture (CAPx) ............................................... 361
Motor Control PWM .................................................. 363
Motor Control PWM Fault ......................................... 363
OC/PWM................................................................... 362
Output Compare (OCx)............................................. 361
QEA/QEB Input ........................................................ 364
QEI Module Index Pulse ........................................... 365
Reset, Watchdog Timer, Oscillator Start-up Timer and
SPIx Master Mode (CKE = 0) ................................... 366
SPIx Master Mode (CKE = 1) ................................... 367
SPIx Slave Mode (CKE = 0) ..................................... 368
SPIx Slave Mode (CKE = 1) ..................................... 369
Timer1, 2, 3 External Clock ...................................... 358
TimerQ (QEI Module) External Clock ....................... 360
ADC Conversion (10-bit mode)................................. 397
ADC Conversion (12-bit Mode)................................. 397
CLKO and I/O ........................................................... 355
External Clock........................................................... 353
Input Capture ............................................................ 361
SPIx Master Mode (CKE = 0) ................................... 393
SPIx Module Master Mode (CKE = 1) ...................... 393
SPIx Module Slave Mode (CKE = 0) ........................ 394
SPIx Module Slave Mode (CKE = 1) ........................ 394
10-bit ADC Conversion Requirements...................... 382
12-bit ADC Conversion Requirements...................... 380
CAN I/O Requirements ............................................. 375
I2Cx Bus Data Requirements (Master Mode)........... 372
I2Cx Bus Data Requirements (Slave Mode)............. 374
Motor Control PWM Requirements........................... 363
Output Compare Requirements................................ 361
PLL Clock ......................................................... 354, 392
QEI External Clock Requirements ............................ 360
QEI Index Pulse Requirements ................................ 365
Quadrature Decoder Requirements.......................... 364
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
ASAM = 0, SSRC<2:0> = 000)......................... 381
ASAM = 1, SSRC<2:0> = 111, SAMC<4:0> =
00001) .............................................................. 381
379
Power-up Timer ................................................ 356
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