IC MCU AVR32 128KB FLASH 144LQFP

AT32UC3A0128-ALUT

Manufacturer Part NumberAT32UC3A0128-ALUT
DescriptionIC MCU AVR32 128KB FLASH 144LQFP
ManufacturerAtmel
SeriesAVR®32 UC3
AT32UC3A0128-ALUT datasheets
 


Specifications of AT32UC3A0128-ALUT

Core ProcessorAVRCore Size32-Bit
Speed66MHzConnectivityEBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o109
Program Memory Size128KB (128K x 8)Program Memory TypeFLASH
Ram Size32K x 8Voltage - Supply (vcc/vdd)1.65 V ~ 1.95 V
Data ConvertersA/D 8x10bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CPackage / Case144-LQFP
Processor SeriesAT32UC3xCoreAVR32
Data Bus Width32 bitData Ram Size32 KB
Interface Type2-Wire, RS-485, SPI, USARTMaximum Clock Frequency66 MHz
Number Of Programmable I/os69Number Of Timers3
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development ToolsEWAVR32, EWAVR32-BL, KSK-EVK1100-PLDevelopment Tools By SupplierATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
Minimum Operating Temperature- 40 CController Family/seriesAT32UC3A
No. Of I/o's109Ram Memory Size32KB
Cpu Speed66MHzNo. Of Timers1
Rohs CompliantYesFor Use WithATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
Lead Free Status / RoHS StatusLead free / RoHS CompliantEeprom Size-
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27.7.2
Pulse Register
PULSE[0..3]
Register Name:
Read/Write
Access Type:
0x10 x CS_number + 0x04
Offset:
Reset Value:
31
30
23
22
15
14
7
6
• NCS_RD_PULSE: NCS Pulse Length in READ Access
In standard read access, the NCS signal pulse length is defined as:
NCS pulse length = (256* NCS_RD_PULSE[6] + NCS_RD_PULSE[5:0]) clock cycles
The NCS pulse length must be at least 1 clock cycle.
In page mode read access, the NCS_RD_PULSE parameter defines the duration of the first access to one page.
• NRD_PULSE: NRD Pulse Length
In standard read access, the NRD signal pulse length is defined in clock cycles as:
NRD pulse length = (256* NRD_PULSE[6] + NRD_PULSE[5:0]) clock cycles
The NRD pulse length must be at least 1 clock cycle.
In page mode read access, the NRD_PULSE parameter defines the duration of the subsequent accesses in the page.
• NCS_WR_PULSE: NCS Pulse Length in WRITE Access
In write access, the NCS signal pulse length is defined as:
NCS pulse length = (256* NCS_WR_PULSE[6] + NCS_WR_PULSE[5:0]) clock cycles
The NCS pulse length must be at least 1 clock cycle.
• NWE_PULSE: NWE Pulse Length
The NWE signal pulse length is defined as:
NWE pulse length = (256* NWE_PULSE[6] + NWE_PULSE[5:0]) clock cycles
The NWE pulse length must be at least 1 clock cycle.
32058J–AVR32–04/11
29
28
27
NCS_RD_PULSE
21
20
19
NRD_PULSE
13
12
11
NCS_WR_PULSE
5
4
3
NWE_PULSE
AT32UC3A
26
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24
18
17
16
10
9
8
2
1
0
405