AT32UC3A0128-ALUT Atmel, AT32UC3A0128-ALUT Datasheet - Page 597

• Manufacturer Part Number: AT32UC3A0128-ALUT
• Description: IC MCU AVR32 128KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0128-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, RS-485, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 66MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

30.8.3
30.8.3.1
Offset:
Register Name:
Access Type:
Reset Value:
• SOFE: Start of Frame Generation Enable
Set this bit to generate SOF on the USB bus in full speed mode and keep alive in low speed mode.
Clear this bit to disable the SOF generation and to leave the USB bus in idle state.
This bit is set by hardware when a USB reset is requested or an upstream resume interrupt is detected (UHINT.TXRSMI).
• RESET: Send USB Reset
Set this bit to generate a USB Reset on the USB bus.
Cleared by hardware when the USB Reset has been sent.
It may be useful to clear this bit by software when a device disconnection is detected (UHINT.DDISCI is set) whereas a
USB Reset is being sent.
• RESUME: Send USB Resume
Set this bit to generate a USB Resume on the USB bus.
Cleared by hardware when the USB Resume has been sent or when a USB reset is requested. Clearing by software has
no effect. This bit should be set only when the start of frame generation is enable. (SOFE bit set).
32058J–AVR32–04/11
31
23
15
–
–
–
7
–
USB Host Registers
USB Host General Control Register (UHCON)
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
–
0x0400
UHCON
Read/Write
0x00000000
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
RESUME
rwu
26
18
10
–
–
0
2
–
RESET
rwu
25
17
–
–
9
0
1
–
AT32UC3A
SOFE
rwu
24
16
–
–
8
0
0
–
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