LPC2138FHN64/01,55 NXP Semiconductors, LPC2138FHN64/01,55 Datasheet - Page 11

• Manufacturer Part Number: LPC2138FHN64/01,55
• Description: IC ARM7 MCU FLASH 512K 64-HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC2100r

Specifications of LPC2138FHN64/01,55

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 47
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC21
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C/SPI/SSP/UART
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 47
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, KSK-LPC2138, KSK-LPC2138-PL
• Development Tools By Supplier: OM10045, OM10070, OM10089
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8-ch x 10-bit)
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4310 - EVAL BOARD LPC2158 W/LCD568-4298 - BOARD EVAL LPC213X KS213X568-4297 - BOARD EVAL LPC21XX MCB2100MCB2130UME - BOARD EVAL MCB2130 + ULINK-MEMCB2130U - BOARD EVAL MCB2130 + ULINK2MCB2130 - BOARD EVAL NXP LPC213X ARM FAM622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K568-2095 - BOARD EVAL FOR LPC213X ARM MCU
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4011; 935281779557; LPC2138FHN64/01

NXP Semiconductors
Table 3.
LPC2131_32_34_36_38
Product data sheet
Symbol
P0.23
P0.25/AD0.4/
AOUT
P0.26/AD0.5
P0.27/AD0.0/
CAP0.1/MAT0.1
P0.28/AD0.1/
CAP0.2/MAT0.2
P0.29/AD0.2/
CAP0.3/MAT0.3
P0.30/AD0.3/
EINT3/CAP0.0
P0.31
P1.0 to P1.31
P1.16/
TRACEPKT0
P1.17/
TRACEPKT1
P1.18/
TRACEPKT2
P1.19/
TRACEPKT3
P1.20/
TRACESYNC
P1.21/
PIPESTAT0
P1.22/
PIPESTAT1
P1.23/
PIPESTAT2
P1.24/
TRACECLK
P1.25/EXTIN0
Pin description
Pin
58
9
10
11
13
14
15
17
16
12
8
4
48
44
40
36
32
28
[5]
[6]
[6]
[4]
[1]
[4]
[4]
[4]
[4]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
Type
I/O
I
O
I
I
I
O
I
I
O
I
I
O
I
I
I
O
I/O
O
O
O
O
O
O
O
O
O
I
…continued
Description
General purpose digital input/output pin.
AD0.4 — ADC 0, input 4. This analog input is always connected to its pin.
AOUT — DAC output. Not available in LPC2131.
AD0.5 — ADC 0, input 5. This analog input is always connected to its pin.
AD0.0 — ADC 0, input 0. This analog input is always connected to its pin.
CAP0.1 — Capture input for Timer 0, channel 1.
MAT0.1 — Match output for Timer 0, channel 1.
AD0.1 — ADC 0, input 1. This analog input is always connected to its pin.
CAP0.2 — Capture input for Timer 0, channel 2.
MAT0.2 — Match output for Timer 0, channel 2.
AD0.2 — ADC 0, input 2. This analog input is always connected to its pin.
CAP0.3 — Capture input for Timer 0, channel 3.
MAT0.3 — Match output for Timer 0, channel 3.
AD0.3 — ADC 0, input 3. This analog input is always connected to its pin.
EINT3 — External interrupt 3 input.
CAP0.0 — Capture input for Timer 0, channel 0.
General purpose digital output only pin.
Important: This pin MUST NOT be externally pulled LOW when RESET pin is LOW or
the JTAG port will be disabled.
Port 1: Port 1 is a 32-bit bidirectional I/O port with individual direction controls for each
bit. The operation of port 1 pins depends upon the pin function selected via the pin
connect block. Pins 0 through 15 of port 1 are not available.
TRACEPKT0 — Trace Packet, bit 0. Standard I/O port with internal pull-up.
TRACEPKT1 — Trace Packet, bit 1. Standard I/O port with internal pull-up.
TRACEPKT2 — Trace Packet, bit 2. Standard I/O port with internal pull-up.
TRACEPKT3 — Trace Packet, bit 3. Standard I/O port with internal pull-up.
TRACESYNC — Trace Synchronization. Standard I/O port with internal pull-up. LOW
on TRACESYNC while RESET is LOW enables pins P1.25:16 to operate as Trace port
after reset.
PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with internal pull-up.
PIPESTAT1 — Pipeline Status, bit 1. Standard I/O port with internal pull-up.
PIPESTAT2 — Pipeline Status, bit 2. Standard I/O port with internal pull-up.
TRACECLK — Trace Clock. Standard I/O port with internal pull-up.
EXTIN0 — External Trigger Input. Standard I/O with internal pull-up.
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 2 February 2011
LPC2131/32/34/36/38
Single-chip 16/32-bit microcontrollers
© NXP B.V. 2011. All rights reserved.
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