Z16F3211FI20SG Zilog, Z16F3211FI20SG Datasheet - Page 129

• Manufacturer Part Number: Z16F3211FI20SG
• Description: IC ZNEO MCU FLASH 32K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F3211FI20SG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-BQFP
• Processor Series: Z16F3x
• Core: Zneo
• Data Bus Width: 16 bit
• Data Ram Size: 2 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z16F2800100ZCOG
• Minimum Operating Temperature: 0 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-4569

Multi-Channel PWM Timer
Architecture
PS022008-0810
The ZNEO
applications. The PWM includes the following features:
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The PWM unit consists of a master timer to generate the modulator time base and six
independent compare registers to set the PWM for each output. The six outputs are
designed to provide control signals for inverter drive circuits. The outputs are grouped into
pairs consisting of a high-side driver and a low-side driver output. The output pairs are
programmable to operate independently or as complementary signals.
In complementary output mode, a programmable dead-time is inserted to ensure non-
overlapping signal transitions. The master count and compare values feed into modulator
logic which generates the proper transitions in the output states. Output polarity and fault/
off-state control logic allows programming of the default off-states which forces the
outputs to a safe state in the event a fault in the motor drive is detected.
115 displays the architecture of the PWM modulator.
Six independent PWM outputs or three complementary PWM output pairs.
Programmable deadband insertion for complementary output pairs.
Edge-aligned or center-aligned PWM signal generation.
PWM off-state is an option bit programmable.
PWM outputs driven to off-state on System Reset.
Asynchronous disabling of PWM outputs on system fault. Outputs are forced to
off-state.
Fault inputs generate pulse-by-pulse or hard shutdown.
12-bit reload counter with 1, 2, 4, or 8 programmable clock prescaler.
High current source and sink on all PWM outputs.
PWM pairs used as general purpose inputs when outputs are disabled.
ADC synchronized with PWM period.
Synchronization for current-sense sample and hold.
Narrow pulse suppression with programmable threshold.
®
Z16F Series includes a Multi-Channel PWM optimized for motor control
P R E L I M I N A R Y
Multi-Channel PWM Timer
Product Specification
ZNEO
Figure 20
Z16F Series
on page
114