MC908JB8JDWE Freescale Semiconductor, MC908JB8JDWE Datasheet - Page 208

• Manufacturer Part Number: MC908JB8JDWE
• Description: IC MCU 8K FLASH 3MHZ 20-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JB8JDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 13
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 20-SOIC (7.5mm Width)
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Controller Family/series: HC08
• No. Of I/o's: 13
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Input/Output Ports (I/O)
12.5.2 Data Direction Register C
Technical Data
208
NOTE:
NOTE:
Address:
Data direction register C determines whether each port C pin is an input
or an output. Writing a logic 1 to a DDRC bit enables the output buffer for
the corresponding port C pin; a logic 0 disables the output buffer.
DDRC[7:0] — Data Direction Register C Bits
Avoid glitches on port C pins by writing to the port C data register before
changing data direction register C bits from 0 to 1.
For those devices packaged in a 20-pin PDIP, 20-pin SOIC, and 28-pin
SOIC package, PTC7–PTC1 are not connected. DDRC7–DDRC1
should be set to a 1 to configure PTC7–PTC1 as outputs.
Figure 12-10
Reset:
Read:
Write:
These read/write bits control port C data direction. Reset clears
DDRC[7:0], configuring all port C pins as inputs.
1 = Corresponding port C pin configured as output
0 = Corresponding port C pin configured as input
DDRC7
$0006
Bit 7
0
Figure 12-9. Data Direction Register C (DDRC)
shows the port C I/O logic.
Input/Output Ports (I/O)
DDRC6
6
0
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
DDRC5
5
0
DDRC4
4
0
DDRC3
3
0
DDRC2
Freescale Semiconductor
2
0
DDRC1
0
1
DDRC0
Bit 0
0