MC908JB8JDWE Freescale Semiconductor, MC908JB8JDWE Datasheet - Page 67

IC MCU 8K FLASH 3MHZ 20-SOIC

MC908JB8JDWE

Manufacturer Part Number
MC908JB8JDWE
Description
IC MCU 8K FLASH 3MHZ 20-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908JB8JDWE

Core Processor
HC08
Core Size
8-Bit
Speed
3MHz
Connectivity
USB
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Processor Series
HC08JB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
USB
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
Minimum Operating Temperature
0 C
Controller Family/series
HC08
No. Of I/o's
13
Ram Memory Size
256Byte
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC908JB8JDWE
Manufacturer:
FREESCALE
Quantity:
21
Part Number:
MC908JB8JDWE
Manufacturer:
FREESCALE
Quantity:
20 000
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor
NOTE:
Exiting stop mode by pulling reset will result in the long stop recovery.
If using an external crystal, do not set the SSREC bit.
COPRS — COP Rate Select Bit
STOP — STOP Instruction Enable Bit
COPD — COP Disable Bit
COPD selects the COP timeout period. Reset clears COPRS. (See
Section 15. Computer Operating Properly
STOP enables the STOP instruction.
COPD disables the COP module. (See
Operating Properly
1 = COP timeout period = (2
0 = COP timeout period = (2
1 = STOP instruction enabled
0 = STOP instruction treated as illegal opcode
1 = COP module disabled
0 = COP module enabled
Configuration Register (CONFIG)
(COP).)
13
18
– 2
– 2
4
4
)×OSCXCLK cycles
)×OSCXCLK cycles
Section 15. Computer
Configuration Register (CONFIG)
(COP).)
Functional Description
Technical Data
67

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