MC908GR60ACFAE Freescale Semiconductor, MC908GR60ACFAE Datasheet - Page 75

• Manufacturer Part Number: MC908GR60ACFAE
• Description: IC MCU 60K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR60ACFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

The following conditions apply when in manual mode:
4.3.6 Programming the PLL
Use the following procedure to program the PLL. For reference, the variables used and their meaning are
shown in
Freescale Semiconductor
1. Choose the desired bus frequency, f
2. Calculate the desired VCO frequency (four times the desired bus frequency).
3. Choose a practical PLL (crystal) reference frequency, f
•
•
•
•
•
ACQ is a writable control bit that controls the mode of the filter. Before turning on the PLL in manual
mode, the ACQ bit must be clear.
Before entering tracking mode (ACQ = 1), software must wait a given time, t
Acquisition/Lock Time
control register (PCTL).
Software must wait a given time, t
clock source to CGMOUT (BCS = 1).
The LOCK bit is disabled.
CPU interrupts from the CGM are disabled.
MHz.
Frequency errors to the PLL are corrected at a rate of f
For stability and lock time reduction, this rate must be as fast as possible. The VCO frequency must
be an integer multiple of this rate. The relationship between the VCO frequency, f
reference frequency, f
N, the range multiplier, must be an integer.
Table
The round function in the following equations means that the real number
should be rounded to the nearest integer number.
4-1.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
f
Variable
f
VCLKDES
BUSDES
f
f
f
RCLK
f
f
VCLK
NOM
BUS
VRS
RCLK
Specifications.), after turning on the PLL by setting PLLON in the PLL
, is:
Table 4-1. Variable Definitions
Desired bus clock frequency
Desired VCO clock frequency
Chosen reference crystal frequency
Calculated VCO clock frequency
Calculated bus clock frequency
Nominal VCO center frequency
Programmed VCO center frequency
AL
f
VCLKDES
, after entering tracking mode before selecting the PLL as the
f
BUSDES
VCLK
= (N) (f
NOTE
= 4 x f
.
Definition
RCLK
BUSDES
)
RCLK
RCLK
. Typically, the reference crystal is 1–8
.
ACQ
Functional Description
(See
VCLK
4.8
, and the
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