MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 467

• Manufacturer Part Number: MC9S12C128CFUE
• Description: IC MCU 128K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C128CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4000 B
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 61
• Number Of Timers: 1
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

16.3.2
The following paragraphs describe, in address order, all the VREG3V3V2 registers and their individual
bits.
16.3.2.1
The VREGCTRL register allows to separately enable features of VREG3V3V2.
16.4
Block VREG3V3V2 is a voltage regulator as depicted in
are the regulator core (REG), a low-voltage detect module (LVD), a power-on reset module (POR) and a
low-voltage reset module (LVR). There is also the regulator control block (CTRL) which represents the
interface to the digital core logic but also manages the operating modes of VREG3V3V2.
Freescale Semiconductor
Module Base + 0x0000
Reset
LVDS
Field
LVIE
LVIF
2
1
0
W
R
Functional Description
Register Descriptions
Low-Voltage Detect Status Bit — This read-only status bit reflects the input voltage. Writes have no effect.
0 Input voltage V
1 Input voltage V
Low-Voltage Interrupt Enable Bit
0 Interrupt request is disabled.
1 Interrupt will be requested whenever LVIF is set.
Low-Voltage Interrupt Flag — LVIF is set to 1 when LVDS status bit changes. This flag can only be cleared by
writing a 1. Writing a 0 has no effect. If enabled (LVIE = 1), LVIF causes an interrupt request.
0 No change in LVDS bit.
1 LVDS bit has changed.
VREG3V3V2 — Control Register (VREGCTRL)
0
0
7
On entering the Reduced Power Mode the LVIF is not cleared by the
VREG3V3V2.
= Unimplemented or Reserved
Figure 16-2. VREG3V3 — Control Register (VREGCTRL)
0
0
6
DDA
DDA
is above level V
is below level V
Table 16-3. MCCTL1 Field Descriptions
MC9S12C-Family / MC9S12GC-Family
0
0
5
LVIA
LVID
Chapter 16 Dual Output Voltage Regulator (VREG3V3V2) Block Description
and FPM.
or RPM or shutdown mode.
Rev 01.24
NOTE
0
0
4
Description
Figure
0
0
3
16-1. The regulator functional elements
LVDS
0
2
LVIE
0
1
LVIF
0
0
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