MC9S12C128CFUE Freescale Semiconductor, MC9S12C128CFUE Datasheet - Page 578

• Manufacturer Part Number: MC9S12C128CFUE
• Description: IC MCU 128K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C128CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4000 B
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 61
• Number Of Timers: 1
• Operating Supply Voltage: - 0.3 V to + 6.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 20 96 Kbyte Flash Module (S12FTS96KV1)
address 0x8000 to 0xBFFF to
(see
from the Flash array starting address (called lower) towards higher addresses,
the Flash array end address
The Flash array addresses covered by these protectable regions are shown in Figure 20-3Figure 20-4.
higher address area is mainly targeted to hold the boot loader code since it covers the vector space.
lower address area can be used for EEPROM emulation in an MCU without an EEPROM module since it
can be left unprotected while the remaining addresses are protected from program or erase.
protection settings as well as security information that allows the MCU to restrict access to the Flash
module are stored in the Flash configuration field described in
1. By placing 0x3E/0x3F in the HCS12 Core PPAGE register, the
578
memory map.
Section
0xFF08–0xFF0C
0xFF00–0xFF07
Flash Address
20.3.2.5) can be set to globally protect the entire Flash
0xFF0D
0xFF0E
0xFF0F
(bytes)
(called higher), and the remaining addresses, can be activated for
Size
any
8
5
1
1
1
physical 16K byte page in the Flash array memory.
Table 20-1. Flash Configuration Field
Backdoor Key to unlock security
Reserved
Flash Protection byte
Refer to
Reserved
Flash Security/Options byte
Refer to
MC9S12C-Family / MC9S12GC-Family
Section 20.3.2.5, “Flash Protection Register (FPROT)”
Section 20.3.2.2, “Flash Security Register (FSEC)”
Rev 01.24
bottom/top fixed
Description
Table
array. Three separate areas, one starting
16 Kbyte
20-1.
pages
one growing downward from
can be seen twice in the MCU
1
Freescale Semiconductor
The FPROT register
Default
protection.
The
The