MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 283

• Manufacturer Part Number: MC9S12E256MFUE
• Description: IC MCU 256K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E256MFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12E
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• On-chip Dac: 2-ch x 8-bit
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 60
• Ram Memory Size: 16KB
• Cpu Speed: 25MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

9.3.2.3
Read: anytime
Write: anytime; writes to the reserved bits have no effect
The baud rate divisor equation is as follows:
The baud rate can be calculated with the following equation:
Freescale Semiconductor
SPPR[2:0]
SPR[2:0}
Reset
Field
6:4
2:0
W
R
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in
mode, a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in
a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Register (SPIBR)
0
0
7
= Unimplemented or Reserved
SPPR2
0
6
Figure 9-5. SPI Baud Rate Register (SPIBR)
BaudRateDivisor
Baud Rate
Table 9-6. SPIBR Field Descriptions
SPPR1
MC9S12E128 Data Sheet, Rev. 1.07
0
5
=
BusClock BaudRateDivisor
SPPR0
=
0
4
SPPR
Description
+
1
0
0
3
2
SPR
Chapter 9 Serial Peripheral Interface (SPIV3)
+
1
SPR2
0
2
Table
SPR1
Table
0
1
9-7. In master mode,
9-7. In master
SPR0
0
0
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