MC9S12E256MFUE Freescale Semiconductor, MC9S12E256MFUE Datasheet - Page 528

IC MCU 256K FLASH 25MHZ 80-QFP

MC9S12E256MFUE

Manufacturer Part Number
MC9S12E256MFUE
Description
IC MCU 256K FLASH 25MHZ 80-QFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12E256MFUE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
60
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.75 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-QFP
Processor Series
S12E
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
16 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
60
Number Of Timers
12
Operating Supply Voltage
0 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
On-chip Dac
2-ch x 8-bit
Controller Family/series
HCS12/S12X
No. Of I/o's
60
Ram Memory Size
16KB
Cpu Speed
25MHz
No. Of Timers
3
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
For Use With
M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Manufacturer
Quantity
Price
Part Number:
MC9S12E256MFUE
Manufacturer:
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Part Number:
MC9S12E256MFUE
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Quantity:
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Chapter 18 Multiplexed External Bus Interface (MEBIV3)
18.3.2.9
Read: Anytime (provided this register is in the map).
Write: Each bit has specific write conditions. Please refer to the descriptions of each bit on the following
pages.
The MODE register is used to establish the operating mode and other miscellaneous functions (i.e.,
internal visibility and emulation of port E and K).
In special peripheral mode, this register is not accessible but it is reset as shown to system configuration
features. Changes to bits in the MODE register are delayed one cycle after the write.
This register is not in the on-chip memory map in expanded and special peripheral modes. Therefore, these
accesses will be echoed externally.
528
Normal Expanded Wide
Emulation Expanded
Emulation Expanded
Special Single Chip
Normal Single Chip
Normal Expanded
Special Test
Peripheral
Mode Register (MODE)
Narrow
Narrow
Reset
Wide
W
R
MODC
0
0
0
0
1
1
1
1
7
= Unimplemented or Reserved
MODB
Figure 18-13. Mode Register (MODE)
0
0
1
1
0
0
1
1
6
MC9S12E128 Data Sheet, Rev. 1.07
MODA
0
1
0
1
0
1
0
1
5
4
0
0
0
0
0
0
0
0
0
IVIS
0
1
1
1
0
0
0
0
3
0
0
0
0
0
0
0
0
0
2
Freescale Semiconductor
EMK
0
1
0
1
0
0
0
0
1
EME
0
1
0
1
0
0
0
0
0

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