MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 271

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IDAM1 and IDAM0— Identifier Acceptance Mode Flags
IDHIT2–IDHIT0— Identifier Acceptance Hit Indicator Flags
The IDHIT indicators are always related to the message in the foreground buffer. When a message gets
copied from the background to the foreground buffer, the indicators are updated as well.
16.12.10 msCAN12 Receive Error Counter
This register reflects the status of the msCAN12 receive error counter. The register is read only.
Freescale Semiconductor
The CPU sets these flags to define the identifier acceptance filter organization. See
Acceptance
are accepted so that the foreground buffer is never reloaded.
The msCAN12 sets these flags to indicate an identifier acceptance hit. See
Acceptance
Address: $010E
The CIDAC register can be written only if the SFTRES bit in CMCR0 is set.
Reset:
Read:
Write:
Filter.
Filter.
Figure 16-25. msCAN12 Receive Error Counter (CRXERR)
RXERR7
IDHIT2
Table 16-8
Table 16-8
IDAM1
Bit 7
0
0
0
0
0
1
1
1
1
0
0
1
1
Table 16-9. Identifier Acceptance Mode Settings
Table 16-10. Identifier Acceptance Hit Indication
= Unimplemented
RXERR6
IDHIT1
6
0
summarizes the different settings. In filter closed mode, no messages
summarizes the different settings.
M68HC12B Family Data Sheet, Rev. 9.1
0
0
1
1
0
0
1
1
IDAM0
0
1
0
1
RXERR5
5
0
IDHIT0
0
1
0
1
0
1
0
1
NOTE
RXERR4
4
0
Identifier Acceptance Mode
Four 16-bit acceptance filters
Two 32-bit acceptance filters
Eight 8-bit acceptance filters
Identifier Acceptance Hit
RXERR3
Filter closed
3
0
Filter 0 hit
Filter 1 hit
Filter 2 hit
Filter 3 hit
Filter 4 hit
Filter 5 hit
Filter 6 hit
Filter 7 hit
RXERR2
Programmer’s Model of Control Registers
2
0
RXERR1
1
0
16.4 Identifier
RXERR0
Bit 0
16.4 Identifier
0
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