MCHC912B32CFUE8 Freescale Semiconductor, MCHC912B32CFUE8 Datasheet - Page 68

• Manufacturer Part Number: MCHC912B32CFUE8
• Description: IC MCU 32K FLASH 8MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC12r

Specifications of MCHC912B32CFUE8

• Core Processor: CPU12
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 63
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 768 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Cpu Family: HC12
• Device Core Size: 16b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 1KB
• # I/os (max): 63
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Package: 80PQFP
• Family Name: HC12
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 63
• Processor Series: HC912B
• Core: HC12
• Data Ram Size: 1 KB
• Maximum Clock Frequency: 8 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912B32E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Resets and Interrupts
68
$FFEC, $FFED
$FFDC, $FFDD
$FFDA, $FFDB
$FFCA, $FFCB
$FFCC, $FFCD
1. See
$FFFC, $FFFD
$FFEE, $FFEF
$FFEA, $FFEB
$FFDE, $FFDF
$FFCE, $FFCF
$FFFE, $FFFF
$FFFA, $FFFB
$FFD8, $FFD9
$FFD6, $FFD7
$FFD4, $FFD5
$FFD2, $FFD3
$FFD0, $FFD1
$FFC2–$FFC9
$FFE8, $FFE9
$FFE6, $FFE7
$FFE4, $FFE5
$FFE2, $FFE3
$FFE0, $FFE1
$FF80–$FFC1
$FFF8, $FFF9
$FFF6, $FFF7
$FFF4, $FFF5
$FFF2, $FFF3
$FFF0, $FFF1
Address
Vector
Table 4-2
for the MC68HC(9)12BC32 interrupt vector map.
Reset
COP clock monitor fail reset
COP failure reset
Unimplemented instruction trap
SWI
XIRQ
IRQ
Real-time interrupt
Timer channel 0
Timer channel 1
Timer channel 2
Timer channel 3
Timer channel 4
Timer channel 5
Timer channel 6
Timer channel 7
Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI serial transfer complete
SCI 0
Reserved
ATD
BDLC
Reserved (not implemented)
Reserved (implemented)
Pulse accumulator B overflow
Modulus down counter underflow
Reserved (implemented)
Interrupt Source
Table 4-1. Interrupt Vector Map
M68HC12B Family Data Sheet, Rev. 9.1
Mask
None
None
None
None
None
CCR
X bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
ATDCTL2
Register
COPCTL
SP0CR1
SC0CR2
RTICTL
MCCTL
TMSK1
TMSK1
TMSK1
TMSK1
TMSK1
TMSK1
TMSK1
TMSK1
TMSK2
PBCTL
INTCR
PACTL
PACTL
BCR1
None
None
None
None
None
—
—
—
—
Local Enable
(1)
TIE, TCIE, RIE, ILIE
COP rate selected
CME, FCME
PBOVI
IRQEN
ASCIE
Bit(s)
PAOVI
None
None
None
None
MCZI
RTIE
SPIE
C0I
C1I
C2I
C3I
C4I
C5I
PAI
TOI
C6I
C7I
—
—
—
—
IE
Freescale Semiconductor
to Highest I Bit
HPRIO Value
to Elevate
$C2–$C8
$80–$C0
$DC
$CC
$CE
$EE
$EC
$EA
$DE
$DA
$D8
$D6
$D4
$D0
$CA
$F2
$F0
$E8
$E6
$E4
$E2
$E0
$D2
—
—
—
—
—
—